Plunger Drive Circuit - Epson DFX-8500 Service Manual

PLUNGER DRIVE CIRCUIT

Figure 2-26 shows a block diagram of the plunger drive circuit. Table 2-12 provides the plunger
specification, and Table 2-13 provides the plunger switching pattern.
Three switching patterns drive the plunger. Gate array ports PLP and PLN output the plunger coil drive
signals. When the PNP port of the gate array turns on, switching transistors Q30 and Q31 are turned on and
the supply voltage (VP3) flows into the plunger coil. When switching transistor Q30 is turned off, Q31 is also
turned off, and the hold voltage (+5 V) flows into the plunger coil via Q32, using the gate array PLN port.
Specification
Form
Supply Voltage
Internal Coil Resistance
Current Consumption
Suspension Roller Status
Closed
Closed -> Opened
Closed with holding voltage
Gate Array
E05B36 (IC1)
Table 2-12. Plunger Specifications
Table 2-13. Plunger Switching Pattern
Q30 and Q31
Off
On
Off
Q30
PLP
B
B
Q32
Figure 2-26. Plunger Drive Circuit Block Diagram
Description
DC solenoid
37 VDC (applied to the drive circuit)
9 Ω + 5 % at 25 o
C
Driving: 3.7 A (maximum)
Holding: 0.4 A
Q32
Off
Off
On
VP 3
NPN
Q31
C B
PNP
E
+5V
PLGP
E
C
OPERATING PRINCIPLES
F3
C
GP3
2-37