Yamaha HTR-6150 Service Manual page 62

A B
RX-V563/HTR-6150/DSP-AX563
1
24.576MHz
2
Optical Out
RX OUT
Coaxial In DIR
RX1
Optical In1
RX3 IC31
Optical In2
RX4
LC89057W
RX5
3 ADC
IC39
PCM1803DBR
XM DT
IC36
4
F2621E
DAC
IC37
PCM1781DBQR
5
SPDIF
HDMI
Rx
IC12
ADV7441A
6
SPDIF
HDMI
Tx
IC11
AD9389B
7
62
C D
DSP CONTROL SECTION BLOCK DIAGRAM
AUDIO_SEL
A B
0 0
1 0
0 1
1 1
Clock for DTS96/24
128fs
SBCK
2fs
SLRCK
256fs (512fs for DTS96/24) IC43
RMCK
64fs
RBCK TC74VHC153FT
fs
RLRCK
RDATA
0
SDIN
1
2
3
DOUT
0
SCKI
BCK
1
LRCK
2
3
A B
AUDIO_SEL_A
AUDIO_SEL_B
IC44
OCLK TC74VHC153FT
SCLK
LRCLK
0
DATA
1
2
3
OCLK
SCLK
LRCLK
0
DATA
1
2
3
A B
AUDIO_SEL_A
AUDIO_SEL_B
MCLKOUT
SCLK
LRCLK
I2S[0]
I2S[1]
I2S[2]
I2S[3]
MCLKOUT
SCLK
LRCLK
I2S[0]
I2S[1]
I2S[2]
I2S[3]
E F
DIR (default)
XM
HDMI (I2S)
Master Clock
Bit Clock
Word Clock
Serial Data
AUDIO_CLK_SEL
0 A (normal) (default)
B (DTS96/24)
1
B
A
B
A
IC33
SEL
TC74VHC157FT
AUDIO_CLK_SEL
TSCLK0
RSCLK0
TFS0
RFS0 SPORT0 SPORT0
Rx Tx
DT0PRI
DR0PRI
DT0SEC
DR0SEC
MICROPROCESSOR
IC41
AD91089Z
RSCLK1 TSCLK1
TFS1
RFS1 SPORT1 SPORT1
Rx
Tx
DT1PRI
DR1PRI
DR1SEC DT1SEC
EBIU
Direct Through Pass
D[0:16]
USB Host
IC71
ISP1760
G H I
• See page 83-90 →
DSP
SCHEMATIC DIAGRAM
SCK
BCK
LRCK
DAC
IC38
PCM1680
IC34
TC74VHC157FT
A
DATA1
B
A
DATA2
B
A
DATA3
B
A
DATA4
B
SEL
AUDIO_DIRECT_ON
AUDIO_DIRECT_ON
0 A (Microprocessor) (default)
B (direct through)
1
J
27,26 DAFL/DAFR
19,20 DAC/DASW
To MAIN P.C.B.
22,21 DASL/DASR
16,15 DASBL/DASBR