Download Print this page

Toshiba TLCS-900/H1 Series Manual page 51

Original cmos 32-bit microcontroller
Hide thumbs Also See for TLCS-900/H1 Series:

Advertisement

(2) Soft start function
The TMP92CH21 can initiate micro DMA either with an interrupt or by using the
micro DMA soft start function, in which micro DMA is initiated by a write cycle which
writes to the register DMAR.
Writing 1 to any bit of the register DMAR causes micro DMA to be performed once.
(If write "0" to each bit, micro DMA doesn't operate). On completion of the transfer, the
bits of DMAR which support the end channel are automatically cleared to 0.
Only one channel can be set once for DMA request. (Do not write "1" to plural bits.)
When writing again 1 to the DMAR register, check whether the bit is "0" before
writing "1". If read "1", micro DMA transfer isn't started yet.
When a burst is specified by the DMAB register, data is transferred continuously
from the initiation of micro DMA until the value in the micro DMA transfer counter is 0.
If execatee soft start during micro DMA transfer by interrupt source, micro DMA
transfer counter doesn't change. Don't use Read-modify-write instruction to avoid
writign to other bits by mistake.
Symbol
Name
Address
109H
DMA
DMAR
(Prohibit
Request
RMW)
(3) Transfer control registers
The transfer source address and the transfer destination address are set in the
following registers. An instruction of the form LDC cr, r can be used to set these
registers.
Channel 0
DMAS0
DMAD0
Channel 7
DMAS7
DMAD7
32 bits
7
6
5
DREQ7
DREQ6
DREQ5
0
0
0
DMA source address register 0
DMA destination address register 0
DMAC0
DMA counter register 0
DMAM0
DMA mode register 0
DMA source address register 7
DMA destination address register 7
DMAC7
DMA counter register 7
DMAM7
DMA mode register 7
8 bits
16 bits
92CH21-49
4
3
DREQ4
DREQ3
DREQ2
R/W
0
0
1: DMA request in software
TMP92CH21
2
1
0
DREQ1
DREQ0
0
0
0
2009-06-19

Advertisement

loading

This manual is also suitable for:

Tmp92ch21fgJtmp92ch21