The MAX2309 is an IF quadrature demodulator with the signal paths consisting of a variable-gain amplifier (VGA) and an I/Q demodulator. The IF LO synthesizer's

reference and RF dividers are fully programmable through the 3-wire serial bus (ASPI_CLK, aSPI_DATA, MAX2309_CS). The 190MHz IF is demodulated to

BaseBand differential in phase (I+ / I-) and quadrature (Q+ / Q-) signals to be passed through to the receiver's backend IC, HARMONY LITE. The IC operates from a

pair of supply voltages RX_VCCD & RX_VCCA derived from VRF_RX_2_775V.

The MAX2309 VCO output frequency is controlled by an internal phase lock loop (PLL) synthesizer. The external loop filter consists of the components connected to

pins #1 and #2 (& pin #26). The VCO output frequency (Tank+ / Tank-) at pins #1and pin #2 are divided down internally, to a desired comparison frequency. The refer-

ence signal at pin #7 (REF_15.36MHz) is also divided down to the same comparison frequency. The two divided signals are compared with a three state digital phase

detector. The internal phase detector drives the charge pump as well as the lock-detect logic. The charge pump output at pin #26(CP_OUT) is processed by the external

loop filter and drives the tunable resonant network, altering the VCO frequency (380MHz) and closing the loop.

The AGC ensures that the I/Q inputs to HARMONY LITE are at constant signal level. The IF_AGC line is controlled by HARMONY_LITE with a DC control range of

1.2V to 2.1V.

The MAX2309 has a shutdown mode to power down the IC, via MAX2309_SHDN*, during the front-end receiver's idling period to conserve battery life. RX_STBY* is

used to shut down VGA and demodulator while maintaining the VCO, PLL, and serial interface active.

ASPI_CLK

ASPI_DATA

SPI

MAX2309_CS

Interface

CDMAPOS

CDMANEG

AGC

REF_FREQ

÷R

Bias

90°

÷2

÷M

Loop

Tank

Filter

Ckt

RX_I+

RX_I-

RX_STBY*

MAX2309_SHDN*

Harmony

Lite

RX_Q+

RX_Q-

MAX2309_LOCK

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A925

Harmony Lite (Receive Section) - Motorola A920 Service Manual

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