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Theory of Operation
from sector cylinder assembly All, and a low Carriage
Retracted output from retract switch S8. The Speed Down
output is low when spindle motor speed is below 0.2
percent of nominal, and the Carriage Retracted signal is low
when the carriage is retracted.
4-21.
Setting LOAD switch S2 on the disc drive front
panel to the LOAD position lights the LOAD switch lamp
and provides a high Load Switch output from assembly Al
to relay control circuits in drive control assembly A10. In
assembly A10, the high Load Switch signal is applied to a
motor latch circuit and to a gate that controls a Drive
Ready output from the assembly. The motor latch circuit is
controlled by the condition of the Load Switch and Car-
riage Retracted signals plus the output of an initial delay
circuit. An initial delay is started when power is applied to
the disc drive and various safety interlock conditions are
satisfied. A power sense circuit monitors the output of the
three voltage regulators in servo amplifier/regulator as-
sembly A4, and provides a high output to the initial delay
circuit. The high Encoder Lamp Interlock and low Inter-
lock Line signals complete the input requirements to the
Initial Delay logic. The Encoder Lamp Interlock output is
high when the head encoder lamp has current, and low
Interlock Lme signal signifies the following disc drive safety
interlocks are complete:
a. A cartridge is properly installed.
b. The disc drive door is closed.
c. The disc drive door is latched.
d. Printed-circuit assemblies A6 through A12 are properly
installed in motherboard assembly A5.
4-22.
During time-out of the initial delay circuit in as-
sembly A10, an Initial Reset output is passed to sector
cylinder assembly All to clear flip-flops in the speed-up
sense circuit. Within assembly A10, the initial delay circuit
also clears the Seek Timer flip-flop and the Drive Fault
flip-flop and passes an R/W Reset signal to read/write
control assembly A 7.
4-23.
Upon completion of the initial delay time-out in
assembly A10, the reset signals are removed and the motor
latch circuit is set for normal drive operation. At this time
the drive ready delay circuit starts a time-out and a Ener-
gize Motor Relay output is sent to motor control assembly
A3 to energize the motor relay. This action applies ac
power to the motherboard fan motor and to the spindle
motor that drives the disc. Concurrently, a Select Enable
signal developed in assembly A10 is passed to the select
circuit in I/O multiplex assembly A12 .. The Energize Motor
Relay output is maintained during disc drive operation.
However, if a condition occurs that causes the motor latch
circuit in assembly A10 to change state, Energize Motor
Relay signal goes high and power is removed from the spindle
and fan motors. Simultaneously, a Retract output is passed
to the Current Command line between encoder assembly A9
and servo amplifier/regulator A4. This action returns the
4-4
7901A
carriage to the retracted position. A disc-drive restart re-
quires new timing cycles through the initial delay and drive
ready delay circuits in assembly A10.
4-24.
Sector transducer assembly A2 supports a light
source and photocell on opposite sides of the slotted skirt
that extends down from the disc hub. As the disc and hub
are rotated by the spindle motor, light passes through the
slots and illuminates the photocells. The photocell develops
electrical pulses (sector pulses) that are amplified and fed to
speed-down and speed-up sense circuits in sector cylinder
assembly All. When the disc speed is below 0.2 percent of
nominal, the Speed Down signal is low as discussed in
paragraph 4-20. When disc speed exceeds this lower limit,
the Speed Down signal is high, and makes the Latch Drive
output from assembly A10 go high. Now the DOOR UN-
LOCKED lamp on indicator assembly Al is extinguished.
As disc speed exceeds 80 percent of nominal, the Speed Up
output from the speed-up sense circuit in assembly All
becomes low and is sent to assembly A10.
4-25.
With the motor latch circuit set for normal opera-
tion, as described in paragraph 4-23, and the Speed Up sig-
nal low with no drive fault in assembly A10, an enabling
signal is passed to the gate that senses time-out of the drive
ready delay circuit. Upon completion of time-out, the Ener-
gize Servo Relay output becomes low and is passed to servo
amplifier/regulator assembly A4 to energize servo relay Kl.
The relay connects the linear motor to servo amplifier
circuits in assembly A4 that control the direction and speed
of carriage movement. Carriage operation is discussed in
subsequent paragraphs.
4-26.
Encoder assembly A9 contains the A-, B- and
C-channel amplifier logic to control carriage movement.
Each amplifier circuit receives positioning information from
the head position encoder. An operation started from the
power-off condition finds the carriage retracted and the
heads in a stored, or unloaded position. This provides a
Heads Loaded output from assembly A9 to the home latch
circuit in assembly A10. The home latch circuit develops
low Servo Inhibit and high Seek Home signals that are
passed back to assembly A9. The low Servo Inhibit signal
disables the fine-position, reverse gate, and forward gate,
thus disconnecting the channel A and
B
amplifier from the
current command circuit. When Seek Home is high, the
command servo home gate is turned on and connects the
output of the channel C amplifier to the current command
circuit. Channel-C positioning information from the head
position encoder passes through assembly A9 to develop a
Current command that is sent to assembly A4 to start the
linear motor. When a zero crossing point is reached by the
channel C amplifier in assembly A9, the carriage and heads
are at the "home," or cylinder 000 position. At this time,
the At Home and Heads Loaded lines from assembly A9 to
assembly A10 become low and high, respectively.
4-27.
The At Home signal in assembly A10 starts a delay
cycle by setting a flip-flop in the home delay circuit. A
Reset Counter output from the flip-flop is passed to as-
sembly All to reset the destination address and current
address registers. After the home delay circuit times out,
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