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12606B
4-104.
When a programmed abort occurs, the computer
performs a CLC instruction with the I/O select code of the
data card. The computer furnishes a true CLC signal to
pin 21 of the data card, producing the same results as the
CLC signal supplied by the DMA system for normal
termination.
4-105.
The equipment fault termination is brought
about by the "not" RY signal becoming positive during the
disc write operation. This resets the SAC FF on the
command card and sets the ABS flip-flop. At the end of the
sector, the Run FF is reset in the normal manner, but
because the SAC FF is reset, the Run FF is not set again at
the start of the next sector. As a result, the "not" W signal
remains true, and at the start of the next sector the bit on
the DW line is not written on the disc and the "not" BC
signal is not supplied. Without "not" BC pulses, the bit
counter and word counter remain in the clear condition and
the WRD and STR FFs remain in the set condition. Because
the STR FF remains set, the Flag FF on the data card
remains reset and SRQ signals are no longer sent to the
DMA system. Note that if the "not" ACL signal becomes
false, only the ABS FF is set. However, if the "not" RY
signal becomes true, the SAC is cleared as well, terminating
the operation.
4-106.
If
a write operation is aborted because the "not"
RY signal becomes true, the DMA channel concerned
becomes locked up. The word count maintained by the
DMA system indicates that additional words must be
supplied to the disc, but because DMA no longer receives
true SRQ signals from the disc data card, it does not furnish
the required words. A programmed check of the DMA
channel, using an SFS or SFC instruction with the DMA
channel I/O select code, will indicate that the DMA channel
is busy. Furthermore, a check of the disc busy bit (bit 0 of
the disc status word)
will
indicate that the disc is busy. The
situation continues until the Flag FF on the DMA control
card, and the Control Bit FF on the disc data channel
interface card, are reset. These two flip-flops can be cleared
by performing one of the following:
a. Start a new disc read or write operation on the
DMA channel concerned, using the normal disc initiation
instructions.
b. Clear the DMA Flag FF by performing a CLF
instruction with the DMA channel I/O select code. Also,
clear the disc Control Bit FF by performing a CLC
instruction with the disc data card I/O select code.
c. Reset the entire I/O system by generating a CRS
signal in any of the following ways:
(1) With the computer stopped, press the PRESET
switch.
(2) Tum off computer power by means of the
POWER switch, then restore power.
(3) Program a CLC instruction, using zero as the
I/O select code.
Section IV
4-107.
Existence of DMA lockup resulting from a fault
in the disc memory or disc memory power supply is
indicated by bit 3 of the disc status word.
If
this bit is 1
after sufficient time has been allowed for completion of the
data transfer, the "not" RY signal was true during the
transfer, the data transfer was probably not completed and
the DMA channel and disc must be cleared by one of the
methods listed in the preceding paragraph. Another method
of checking for the existence of the lockup condition is to
perform an LIA/B instruction using the DMA channel I/O
select code. This instruction places in positions 13-0 of the
computer A- or B-register the number in the DMA word
count register. (This register is on the DMA register card.)
Bit 0 in the computer A- or B-register will contain the
low-order bit of the word count.
If
sufficient time has been
allowed for completion of the transfer, the word count
should be zero.
4-108.
POST-WRITE STATE. After termination of
writing, either by DMA or by a programmed CLC
instruction, flip-flops and registers on the disc interface
cards will be in the condition listed below. The state of
flip-flops and registers not listed depends on prior
operations.
(If
an operation is terminated before the end of
a sector, the bit counter and word counter remain running
and the Run FF remains set until the end of the sector is
reached. The RP FF is reset then set, at the end of each
remaining word in the sector.)
a.
The Control Bit FF is reset.
b.
The Flag FF is reset.
c.
The Run FF is reset.
d.
The SAC FF is reset.
e.
The sector counter contains the address of the
next disc sector, and is running.
f.
The word counter is reset and not running.
g.
The EOS FF is reset.
h.
The bit counter is reset and not running.
i.
The STR FF is set.
j.
The WRD FF is set.
k.
The DI FF is set.
4-109.
READ OPERATIONS.
4-110.
Disc read operations are very similar to disc write
operations. Therefore, only the principal functions of
reading are presented, together with detailed discussion of
the operations unique to the read process.
4-111.
When reading is to be performed, the DMA
system and disc memory are initialized in the same manner
as the writing. First, an OTA/B .instruction with the
4-13
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