HP 12606B Operating And Service Manual page 13

Disc memory interface kit
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Section III
12606B,.
Table 3-3. Data-Transfer Control Words (Continued)
CONTROL
WORD
DESCRIPTION
CW3
CW3 is the DMA block length word. Format and content are as follows:
Bits 15 and 14. Not used.
Bits 13 thm O. The 2's complement of the number of words to be transferred to or from the disc.
Bit 0 is the low-order bit.
e
CW4 is the disc function and disc address word. Format and content are as follows:
Bit 15. Logic 1 specifies disc write. Logic 0 specifies disc read.
Bit 14. Not used.
Bitsh3thm 7.
1
Disc starting track. Bit 7 is the low-order bit .
.,.
Bits 6 thru O. Disc starting sector. Bit 0 is the low-order bit.
Table 3-4. Typical Disc Subroutine
3-59.
If
a disc write operation is to be performed, the
disc status word can be read a second time after the disc
track is specified by a SW4 word, and bit 2 of the status
word can then be checked to ensure that the track
is
not
protected.
It
is particularly desirable
to
check bit 2 when
the track-protect switch must be set to the nonprotect
position in order to write in the selected track. After
completion of the data transfer to or from the disc, the disc
status word can be read once more to check bit 3.
If
this bit
is logic 1, the data transfer was probably not completed
successfully. After a read operation bit 1 can also be
checked to determine whether a parity error occurred.
OP CODE
OPERAND
LOA
CW1
OTA
6
CLC
2
LDA
CW2
OTA
2
STC
2
LDA
CW3
OTA
2
LOA
CW4
OTA
11
STC
6,C
STC
10
3-6
REMARKS
INITIALIZE DMA CHANNEL 1
Fetch CW1 from core memory
and load in the A-register.
Output CW1 to DMA
channel 1.
Prepare DMA channel 1
memory address register to
receive CW2.
Fetch CW2 from core memory
and load in the A-register.
Output CW2 to DMA
channel 1.
Prepare' DMA channel 1
word-count register to
receive CW3.
Fetch CW3 from core memory
and load in the A-register.
Output CW3 to DMA
channel 1.
INITIALIZE DISC MEMORY
Fetch CW4 from core memory
and load in the A-register.
Output CW4 to disc
command channel.
START TRANSFER OF DATA
Activate DMA channel
1.
Initiate disc data
transfer.
3-60.
To demonstrate the principles of disc program-
ming, table 3-4 presents a typical disc subroutine. For
simplicity, the subroutine makes no checks of the disc
status word. The subroutine reads a block of 4096
(decimal) words in disc track 10 (octal), starting at
sector 25 (octal), and stores the words in core memory
starting with address 10,000 (octal). DMA channell is
used, and the disc interface cards are in slots having an
1/0
select code of 10 (data channel card) and 11 (command
channel card). The control words are as follows:
a. CW1: 020010 (octal). This control word turns off
the disc control bit flip-flop after the last word has been
transferred (bit 13 is logic 1), and specifies the
1/0
select
code of the disc data channel (bits 5 through 0 are 10,
octal).
b. CW2: 110000 (octal). This control word specifies a
core memory write operation (bit 15 is logic 1) and desig-
nates the starting address in core memory (bits 14 through
o
are 10000, octal).
c. CW3: -4096 (decimal). This control word, after
program assembly, specifies the 2's complement of the
number of words to be transferred.
d. CW4: 000425 (octal). This control word specifies
drum read (bit 15 is logic 0), track 10 (bits 13 through 7
are
010 octal) beginning with sector 025 (bits 6 through 0
are
025, octal).

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