Interrupt Processing - Toshiba TC9314F Manual

INT INT INT
15 14 13
00 0 0 0
01 0 0 0
02 0 0 0
03 0 0 0
04 0 0 0
05 0 0 0
06 0 0 0
07 0 0 0
08 0 0 1
･ ･ ･ ･
･
･ ･ ･
･ ･ ･ ･
16 0 1 0
･ ･ ･ ･
･ ･ ･
･
･ ･ ･ ･
32 1 0 0
･ ･ ･ ･
･ ･ ･ ･
･ ･ ･ ･
63 1 1 1

3. Interrupt Processing

To handle interrupts, set the interrupt control port to enable interrupts, then wait for an interrupt.
When an interrupt is received, the interrupt request is held in the interrupt flip-flop. If the interrupt
enable bit and request is held in the interrupt flip-flop. If the interrupt enable bit and interrupt enable
flip-flop are set to "1", the interrupt request is passed to the CPU. When an interrupt is generated, the
interrupt flip-flop and the interrupt enable flip-flop for the interrupt are reset to "0". Then, control
branches to the entry address. At the same time, the interrupt 1 and interrupt 2 enable bits are also reset
to "0". This temporarily disables any further interrupts. However, the interrupt counter is not reset and
continues to measure any further interrupt signals. Therefore, if necessary, use software to set the
interrupt input control bits.
To handle multiple interrupts, set the interrupt enable bit to "1" in the interrupt service program.
The entry address specifies the branch destination address for the interrupt service program. During
interrupt processing, the contents of the program counter are automatically saved to the stack. However,
registers and memory area data are not saved automatically. If required, save such data in the interrupt
service program. When handling multiple interrupts, be careful that the memory used to save the data
does not overlap.
The interrupt service program sets the interrupt enable bit to "1", then terminates by executing the RN
instruction.
Setting the interrupt enable bit to "1" and executing the RN instruction resets the interrupt enable
flip-flop back to "1". Therefore, the next interrupt can be processed immediately after the instruction is
executed.
Interrupt 1
INT INT INT
Timer Interval
12 11 10
0 0 0 Prohibited
0 0 1 0.12~ [ms]
0 1 0 0.3~ [ms]
1 0 0 0.5~ [ms]
0 1 1 0.7~ [ms]
1 0 1 0.9~ [ms]
1 1 0 1.1~ [ms]
1 1 1 1.3~ [ms]
0 0 0 1.5~ [ms]
･ ･ ･ ･
･ ･ ･ ･
･ ･ ･ ･
0 0 0 3.1~ [ms]
･ ･ ･ ･
･ ･ ･ ･
･ ･ ･ ･
0 0 0 6.3~ [ms]
･ ･ ･ ･
･ ･ ･ ･
･ ･ ･ ･
1 1 1 12.5~ [ms]
INT INT INT
25 24 23
00 0 0 0
01 0 0 0
02 0 0 0
03 0 0 0
04 0 0 0
05 0 0 0
06 0 0 0
07 0 0 0
08 0 0 1
･ ･ ･ ･
･
･ ･ ･
･ ･ ･ ･
16 0 1 0
･ ･ ･ ･
･ ･ ･
･
･ ･ ･ ･
32 1 0 0
･ ･ ･ ･
･ ･ ･ ･
･ ･ ･ ･
63 1 1 1
48
TC9314F
Interrupt 2
INT INT INT
Timer Interval
22 21 20
0 0 0 Prohibited
0 0 1 0.12~ [ms]
0 1 0 0.1~
1 0 0 0.2~
0 1 1 0.3~
1 0 1 0.4~
1 1 0 0.5~
1 1 1 0.6~
0 0 0 0.7~
･ ･ ･ ･
･ ･ ･ ･
･ ･ ･ ･
0 0 0 1.5~
･ ･ ･ ･
･ ･ ･ ･
･ ･ ･ ･
0 0 0 3.1~
･ ･ ･ ･
･ ･ ･ ･
･ ･ ･ ･
1 1 1 6.2~
2003-07-03
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