5
No.
Pin Name
I/O
181 23_VFLB
I
182 27M_GEN
I
−
183
GND
−
Vcco
184
185 14_SCK
I
−
Vccint
186
187 23_VFLA
I
188 23_SAFB
I
189 23_SAFA
I
−
190
GND
191 23_RESET#
O
192 14_M3
O
193 14_M2
O
194 14_M1
O
195 14_M0
O
−
196
Vccint
−
197
Vcco
−
198
GND
199 14_RESET
O
200 14_ERF
I
201 14_CBL
I
202 14_U
I
203 14_VERF
I
204 14_SDATA
I
205 14_FSYNC
I
206 14_SCK
I
207 (TCK)
I
−
Vcco
208
5
6
Validity Flag input for CH3/4
27MHz system clock input
Digital GND
I/O power supply (3.3V)
Audio clock input for AES/EBU
Core power supply (2.5V)
Validity Flag input for CH1/2
Start of audio frame input for CH3/4
Start of audio frame input for CH1/2
Digital GND
Reset output
Audio output form setting
Audio output form setting
Audio output form setting
Audio output form setting
Core power supply (2.5V)
I/O power supply (3.3V)
Digital GND
Reset output
Error flag Indicator
Channel Status Block Indicator
-
Validity + Error flag Indicator(Logical OR)
Data input for AES/EBU
LR clock input for AES/EBU
Serial clock input for AES/EBU
JTAG TCK
I/O power supply (3.3V)
6
7
Pin Function
PRA-BD11
7
8
A
B
C
D
E
F
91
8