Condition Under Which Hardware Counters Are Handled As Software Counters - Mitsubishi Electric MELSEC-Q Structured Programming Manual

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FXCPU Structured Programming Manual
[Device & Common]
2.7.9

Condition under which hardware counters are handled as software counters

High speed counters are classified into hardware counters and software counters. Under some conditions,
however, hardware counters are handled as software counters.
In this case, use such counters within the range of maximum response frequency and total frequency
determined for software counters.
Conditions under which hardware counters are handled as software counters
Counter No.
FX
/FX
PLCs
3U
3UC
C235
C236
C237
C238
C239
C240
C244(OP)
C245(OP)
C246
C248(OP)
C251
C253
FX
/FX
PLCs
2N
2NC
C235
C236
C246
C251
Conditions under which hardware counters are handled as software counters
Because hardware counters execute counting at the hardware level of the PLC, they can execute counting
without regard to the total frequency.
However, they are handled as software counters in the following conditions.In this case, the maximum
response frequency and total frequency are restricted in the same way as other software counters.
Use M8380 to M8387 to know whether high speed counters are handled as hardware counters or software
counters (only in FX
/FX
PLCs).
3U
3UC
When the DHSCS, DHSCR, DHSZ or DHSCT instruction is used for a hardware counter number, the
corresponding hardware counter is handled as a software counter.
(FX
/FX
PLCs do not support the DHSCT instruction.)
2N
2NC
Example: C235
OUT_C_32
EN
CCoil
CC235
K
CValue
EN
s1
K100
CN235
s2
In this case, C235 is handled as a software counter.
When an index register is used for a counter number specified in the DHSCS, DHSCR, DHSZ or DHSCT
instruction, all hardware counters are handled as software counters (only in FX
Example: C235Z0
EN
s1
K100
s2
CN235Z0
C253 (hardware counter) is handled as a software counter when the logic is reversed using the external
reset input signal logic change function (only in FX
Example: When the logic of the external reset input signal is reversed for C253
→ For reverse of the logic of the external reset input signal, refer to Subsection 2.7.6.
M8388
M8389
OUT_C_32
EN
CCoil
CC253
K
CValue
ENO
DHSCS
ENO
d
Y000
DHSCS
ENO
d
Y000
/FX
PLCs).
3U
3UC
ENO
2 Devices in Detail
2.7 High Speed Counter [C]
/FX
PLCs).
3U
3UC
83
1
2
3
4
5
6
7

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