Bkcu-Vd1 - Sony BCU-100 Maintenance Manual

1-8-3. BKCU-VD1

The BKCU-VD1 consists of the VIF-40 board. It receives
the graphic data from RSX and outputs the graphic data
from the DVI-I connector as the DVI output of the VESA
specification or the analog RGB output supporting the
following resolutions.
640 x 480 (VGA), 1024 x 786 (XGA), 1280 x 768
(WXGA), 1280 x 1024 (SXGA), 1600 x 1200 (UXGA),
1920 x 1200 (WUXGA)
Among these resolutions, the analog RGB output supports
the resolution up to 1280 x 1024 (SXGA).
VIF-40 board
The VIF-40 board consists mainly of the power supply
block, FPGA configuration block, video processor block
and the control block. The major parts are the DC-DC
converter/LDO, the FPGA/PLD, the DVI transmitter and
the DA converter for analog RGB.
The power supply block receives +12 V from the BE-28
board and generates the two regulated powers of +1.2 V
and +5 V by the DC-DC converter with dual output. The
+1.2 V power is supplied to FPGA as the core power, and
+5 V is supplied to the secondary regulator as the power
supply to it. The secondary regulator circuit generates +3.3
V and +1.5 V from the DC-DC converters as the power
supply to the digital circuits. The +3.3 V that is used as the
power of the DA converter for the analog circuit is gener-
ated by LDO. The +1.8 V power is generated by the small
power LDO because it is used by PLD only.
The PLD (EPM1270 manufactured by Altera) has the
function of controlling the flash memory that contains the
FPGA configuration and its data. Data is written in a single
plane only of the flash memory from the system via the
SPI bus. The flash memory has the two planes for the
FPGA data area. One plane is used for writing the factory
data. The flash memory has a fail safe structure. If version
upgrade file has failed in writing the version upgrade data
for some reason, the system boots from the plane contain-
ing the factory data.
The flash memory contains a free memory area in which
the model name, board name and serial number are written
as the control information.
BCU-100 MM
The FPGA consists of the DVI transmitter manufactured
by Silicon Image, the video signal block and the control
block. The DVI transmitter receives video data from RSX
and the video signal block outputs the RGB data to the DA
converter. The control block is connected to the SPI bus
and the I2C bus coming from system control. The circuit
configuration is designed to allow installation of the two
pieces of the DVI transmitter taking the dual link configu-
ration (when supporting WQXGA) of DVI into consider-
ation. However, because it is not supported by the BKCU-
VD1, the DVI transmitter is not mounted on the sub side of
the FPGA. The RGB data is sent from RSX to FPGA, and
from FPGA to DVI transmitter by DDR. However the
RGB data is transmitted by SDR in the BKCU-VDI
because the DDR transmission is used only in the dual link
mode (WQXGA) between RSX and FPGA.
Regarding DDC from the DVI connector, OS can check
EDID of the monitor.
1-17 (E)