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5.2.5 Register Indirect Addressing with Displacement
In this mode, memory is accessed beginning with the address that is derived by adding a specified immediate (dis-
placement) to the register content. Unless ext instructions are used, this addressing mode can only be used for load
instructions that have [%sp+imm7] as the operand.
Example: ld.b
%r0,[%sp+0x10]
The byte data at the address derived by adding 0x10 to the content of the current SP is loaded into the R0
register.
If ext instructions described in Section 5.3 are used, ordinary register indirect addressing ([%rb]) becomes a spe-
cial addressing mode in which the immediate specified by the ext instruction constitutes the displacement.
Example: ext
imm13
ld.b
%rd,[%rb]
5.2.6 Signed PC Relative Addressing
This addressing mode is used for the jpr, jr*, and call instructions that have a signed 7- or 10-bit immediate
(sign7/sign10) or %rb in their operand. When these instructions are executed, the program branches to the address
derived by twice adding the sign7/sign10 value (16-bit boundary) or the rb register value to the current PC.
Example: PC + 0
jrne
:
:
PC + 8
5.2.7 PC Absolute Addressing
This addressing mode is used for the jpa, and calla instructions that have an unsigned 7-bit immediate (imm7)
or %rb in their operand. When these instructions are executed, the program directly branches to the address speci-
fied with the imm7 or rb register value by loading the value to the PC. Also this addressing mode is used for the
int and intl instructions that execute interrupt handler routines.
Example: int
0x03
S1C17 CORE MANUAL
(Rev. 1.2)
The memory address to be accessed is "%rb+imm13."
The program branches to the PC + 8 address when the jrne branch
0x04
:
condition holds true.
(PC + 0) + 0x04 * 2 → PC + 8
:
Executes the interrupt handler of vector No. 3 (TTBR + 0xc).
Seiko Epson Corporation
5 INSTRUCTION SET
5-7
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