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adc
%rd, %rs
adc/c
%rd, %rs
adc/nc %rd, %rs
Function
16-bit addition with carry
Standard)
Extension 1) rd(15:0) ← rs(15:0) + imm13(zero extended) + C, rd(23:16) ← 0
Extension 2) rd(15:0) ← rs(15:0) + imm16 + C, rd(23:16) ← 0
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Code
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0
1
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0
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0
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1
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IL
IE
C
Flag
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– ↔ ↔ ↔ ↔
–
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– ↔ ↔ ↔
–
–
Mode
Src: Register direct %rs = %r0 to %r7
Dst: Register direct %rd = %r0 to %r7
CLK
One cycle
Description
(1) Standard
adc
The content of the rs register and C (carry) flag are added to the rd register. The operation is
performed in 16-bit size, and bits 23–16 of the rd register are set to 0.
(2) Extension 1
ext
adc
The 13-bit immediate imm13 and C (carry) flag are added to the content of the rs register after
being zero-extended, and the result is loaded into the rd register. The operation is performed
in 16-bit size, and bits 23–16 of the rd register are set to 0. The content of the rs register is not
altered.
(3) Extension 2
ext
ext
adc
The 16-bit immediate imm16 and C (carry) flag are added to the content of the rs register, and
the result is loaded into the rd register. The operation is performed in 16-bit size, and bits 23–16
of the rd register are set to 0. The content of the rs register is not altered.
(4) Conditional execution
The /c or /nc suffix on the opcode specifies conditional execution.
adc/c
adc/nc Executed as adc when the C flag is 0 or executed as nop when the flag is 1
In this case, the ext instruction can be used to extend the operand.
(5) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Example
(1) adc
(2) Addition of 32-bit data, data 1 = {r2, r1}, data 2 = {r4, r3}, result = {r2, r1}
add
adc
S1C17 CORE MANUAL
(Rev. 1.2)
rd(15:0) ← rd(15:0) + rs(15:0) + C, rd(23:16) ← 0
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1
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r d
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1
1
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0
r d
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1
1
0
r d
0
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V
Z
N
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adc
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adc/c, adc/nc
; rd ← rd + rs + C
%rd,%rs
imm13
; rd ← rs + imm13 + C
%rd,%rs
imm3
; imm3(2:0) = imm16(15:13)
imm13
; = imm16(12:0)
; rd ← rs + imm16 + C
%rd,%rs
Executed as adc when the C flag is 1 or executed as nop when the flag is 0
%r0,%r1
; r0 = r0 + r1 + C
%r1,%r3
; Addition of the low-order word
%r2,%r4
; Addition of the high-order word
Seiko Epson Corporation
5
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2
1
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0
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1
r s
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0
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1
r s
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1
0
1
r s
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7 DETAILS OF INSTRUCTIONS
adc
adc/c
adc/nc
7-3
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