Theory of Device Operation
HDIC
WDX/WDY
RDC
Write
PreCompen-
sation
WTGATE
Figure 4.5 Read/write circuit block diagram
4-12
SD
SC
SE
Serial I/O
Registers
Digital
PLL
REFCLK RDGATE
DATA
[7:0]
RDX/RDY
AGC
Amplifier
Programmable
Filter
Flash
Digitizer
ServoPulse
MEEPR
Detector
Viterbi
Detect
16/17
ENDEC
Position
A/B/C/D
(to reg)
RWCLK
SRV_CLK
SRV_OUT[1:0]
C141-E104-03EN