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Summary of Contents for National Instruments PSHR68-68M
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NI PSHR68-68M Shielded 68-Pin Cable In Stock Used and in Excellent Condition Open Web Page https://www.artisantg.com/63734-67 A l l t r a d e m a r k s , b r a n d n a m e s , a n d b r a n d s a p p e a r i n g h e r e i n a r e t h e p r o p e r t y o f t h e i r r e s p e c t i v e o w n e r s .
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NI 653X User Manual for Traditional NI-DAQ High-Speed Digital I/O Devices for PCI, PXI, CompactPCI, AT, EISA, and PCMCIA Bus Systems NI 653X User Manual February 2005 371464D-01...
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The reader should consult National Instruments if errors are suspected. In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it.
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These classes are known as Class A (for use in industrial-commercial locations only) or Class B (for use in residential or commercial locations). All National Instruments (NI) products are FCC Class A products. Depending on where it is operated, this Class A product could be subject to restrictions in the FCC rules. (In Canada, the Department of Communications (DOC), of Industry Canada, regulates wireless interference in much the same way.) Digital...
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Conventions The following conventions appear in this manual: <> Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name—for example, DIO<3..0>. » The » symbol leads you through nested menu items and dialog box options to a final action.
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NI 653X Overview ......................1-1 Control Lines ....................1-2 What You Need to Get Started ..................1-2 Choosing Your Programming Software ................1-3 National Instruments Application Software ............1-3 NI-DAQ Driver Software ................1-4 Installing Your Software....................1-6 Unpacking Your NI 653X ....................1-6 Installing Your NI 653X ....................1-7 Installing the NI PCI-DIO-32HS, NI PCI-6534, or NI PCI-7030/6533..1-7...
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Contents Starting and Stopping Data Transfer—Triggering.......... 2-8 Start and Stop Trigger............... 2-9 Choosing Continuous or Finite Data Transfer ..........2-11 Finite Transfers................. 2-11 Continuous Input ................2-11 Continuous Output................2-11 Choosing DMA or Interrupt Transfers ..........2-12 Monitoring Data Transfer ................2-12 Connecting Signals ..................
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Chapter 1 Getting Started with Your NI 653X computer. If you are using the NI PXI-6534 or NI PXI-6533 in a PXI chassis, RTSI lines, known as the PXI trigger bus, are part of the backplane. In addition, a phase-locked loop (PLL) circuit accomplishes the synchronization of multiple NI PXI-6534 devices or other PXI devices which support PLL synchronization by allowing these devices to all lock to the same reference clock present on the PXI backplane.
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Visual Basic, is a development suite that allows you to design test and measurement applications. For Visual Basic developers, Measurement Studio features a set of ActiveX controls for using National Instruments DAQ hardware. These ActiveX controls provide a high-level programming interface for building VIs.
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Chapter 1 Getting Started with Your NI 653X offers a set of Visual C++ classes and tools to integrate those classes into Visual C++ applications. The ActiveX controls and classes are available with Measurement Studio and the NI-DAQ software. Using LabVIEW, LabWindows/CVI, or Measurement Studio greatly reduces the development time for your data acquisition and control application.
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Chapter 1 Getting Started with Your NI 653X Table 1-1. NI 653X Devices and NI-DAQ Support (Continued) NI-DAQ Version Device Supported Windows NI PCI-6534 Version 6.9 or later NI PCI or PXI-7030/6533 Version 6.5.2 or later Installing Your Software Install application development software, such as LabVIEW or LabWindows/CVI, according to instructions on the CD and the release notes.
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Chapter 1 Getting Started with Your NI 653X Power off and unplug your PXI or CompactPCI chassis. Choose an unused PXI or CompactPCI 5 V peripheral slot. For maximum performance of your CompactPCI system, install the NI PXI-653X in a slot that supports bus arbitration or bus-master cards. The NI PXI-653X contains onboard bus-master direct memory access (DMA) logic that can operate only in such a slot.
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Misuse of the product can result in a hazard. You can compromise the safety protection built into the product if the product is damaged in any way. If the product is damaged, return it to National Instruments for repair. Do not substitute parts or modify the product except as described in this document.
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Chapter 1 Getting Started with Your NI 653X include signal levels, special equipment, limited-energy parts of equipment, circuits powered by regulated low-voltage sources, and electronics. • Installation Category II is for measurements performed on circuits directly connected to the electrical distribution system. This category refers to local-level electrical distribution, such as that provided by a standard wall outlet (for example, 115 V for U.S.
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Chapter 2 Using Your NI 653X Controlling and Monitoring Static Digital Lines—Unstrobed I/O This section explains how to control and monitor static digital lines through software-timed reads and writes to and from the digital lines of your NI 653X. Configuring Digital Lines For unstrobed I/O, the direction of each of the 32 data lines is individually configurable.
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Chapter 2 Using Your NI 653X Table 2-1. Port 4 Lines Direction Line I/O Pins Input STOPTRIG 1 STOPTRIG 2 REQ 1 REQ 2 Output (standard) PCLK 1 PCLK 2 ACK 1 ACK 2 Connecting Signals Connect digital input signals to the I/O connector using the pinout diagrams, Figure C-1, NI 653X I/O Connector 68-Pin Assignments, and...
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Chapter 2 Using Your NI 653X • LabVIEW—Use the Easy Digital I/O VI from the following list that is appropriate for your task: – Read from Digital Line VI to read from a single line – Write to Digital Line VI to write to a single line –...
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Chapter 2 Using Your NI 653X Specifying the Transfer Rate If you are internally generating the REQ signal, you must specify the data transfer rate. The transfer rate is specified in software by using two parameters, the timebase frequency and timebase divisor: timebase frequency transfer rate (Hz) --------------------------------------------- -...
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Chapter 2 Using Your NI 653X ACK (STARTTRIG) STOPTRIG Pretrigger Data Posttrigger Data Figure 2-5. Using a Start and Stop Trigger Pattern-Matching Trigger (Input Only) Instead of using an external signal on the start/stop trigger pins on the I/O connector, you may start or stop (not both) an operation once a user-specified digital pattern is matched or not matched.
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Chapter 2 Using Your NI 653X ♦ NI 6534 With the NI 6534, if you want to repeatedly generate the same block of data, you can load a buffer of data into onboard memory and continuously loop through this data block. With this option, data is only transferred from computer memory to the device onboard memory once, and the device continuously generates the same block of data from its onboard memory.
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Chapter 2 Using Your NI 653X Creating a Program Using the following flowcharts as a guide, create a program to perform pattern I/O. Figures 2-7 and 2-8 display flowcharts for C programming using NI-DAQ, while Figure 2-9 shows a LabVIEW programming flowchart.
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Chapter 2 Using Your NI 653X DIO Clear VI DIO Config VI Digital Trigger Config VI Write? Trigger? DIO Write VI Trigger? Done? DIO Read/Write VI Digital Trigger Config VI DIO Start VI Figure 2-9. Programming Pattern I/O in NI-DAQ LabVIEW/LabVIEW RT API Notes If you are using an external clock for finite pattern input, the NI 653X requires an extra clock edge to move data from the DIO ASIC and into the computer memory after the...
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Chapter 2 Using Your NI 653X From the perspective of the NI 653X, the peripheral device requests the transfer of data by signaling on the REQ line. The NI 653X acknowledges it is ready to transfer data by signaling on the ACK line. Use Table 3-1, Handshaking Protocol Characteristics, to select a...
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Chapter 2 Using Your NI 653X Choosing Continuous or Finite Data Transfer You can transfer data indefinitely to/from computer memory or finitely by specifying the number of points you want to transfer. Finite Transfers For finite transfers, the NI 653X transfers the specified amount of data to/from a computer memory buffer and stops the operation.
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Chapter 2 Using Your NI 653X Confirm Ready 653 X Device Your Peripheral Device Figure 2-10. Connecting Signals If you are using the burst protocol, make the connection to the appropriate PCLK pin on the NI 653X. Choosing the Startup Sequence To avoid invalid or missing data when the ACK and REQ lines change polarity to either active high or active low, start a transfer using one of the following methods:...
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Chapter 2 Using Your NI 653X DIG_Grp_Config DIG_Block_In Is the Read? DIG_DB_HalfReady next half buffer ready? DIG_Grp_Mode DIG_Block_Out DIG_DB_Transfer Continuous? DIG_DB_Config Acquisition Complete? DIG_Block_In Read? DIG_Block_Check DIG_Block_Out Acquisition DIG_Block_Clear Complete? Figure 2-11. Programming Buffered Handshaking I/O in NI-DAQ C API NI 653X User Manual 2-24 ni.com...
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Chapter 2 Using Your NI 653X Buffered DIO Config VI Operation? Burst Digital Group DIO Start VI Config VI Mode? Digital Single Read VI Finite DIO Read VI Reverse Buffer? PCLK Digital Group Direction? Config VI Resets lines to DIO Read VI Done? default states.
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Chapter 2 Using Your NI 653X The preloading process causes a small delay between the start command in software and the actual start of data transfer. If this delay is a concern, you may disable the preloading by calling the following function/VI before the software start command: •...
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Chapter 2 Using Your NI 653X Deciding How to Start and Stop Data Transfer—Triggering By default, data transfer starts upon a software command (the Digital Buffer Control VI called by the DIO Start VI in LabVIEW and the functions in NI-DAQ C interface). DIG_Block_In DIG_Block_Out However, you can use a hardware trigger to start, stop, or start and stop data...
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Chapter 2 Using Your NI 653X Value to Detect Pattern Mask Polarity Postive: Search for Match Figure 2-19. Pattern-Detection Trigger Example To prevent a transient data value during line switching from falsely causing a match, set a valid pattern for at least 60 ns to guarantee detection. In addition, keep glitches to less than 20 ns to guarantee rejection.
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Chapter 2 Using Your NI 653X DIG_Grp_Config Is the DIG_Block_In DIG_DB_HalfReady next half buffer ready? DIG_Block_PG_Config DIG_DB_Transfer DIG_Trigger_Config DIG_DB_Config Specify Data Mask Here Acquisition Complete? DIG_Block_Clear Figure 2-20. Programming Change Detection (Continuous) in NI-DAQ C API DIG_Grp_Config DIG_Block_Clear DIG_Block_PG_Config Acquisition DIG_Trigger_Config DIG_Block_In DIG_Block_Check...
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Chapter 3 Timing Diagrams Programmable: = Interval x Timebase Period dtp will remove bar Programmable: = One Timebase Period if Active Low if Active High Data Valid (Output Mode) 30 ns Data Valid (Input Mode) 30 ns 0 ns Parameter Description Cycle time Width of pulse...
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Chapter 3 Timing Diagrams PCLK Data In Valid = Data Transfer Occurs Figure 3-3. Burst Transfer Example (Input) PCLK Data Out Valid = Data Transfer Occurs Figure 3-4. Burst Transfer Example (Output) Note Data is transferred only when both the NI 653X and the peripheral device are ready (and thus ACK and REQ are asserted), so it is not reasonable to expect data to arrive at consistent intervals.
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Chapter 3 Timing Diagrams PCLK Data Out Valid Parameter Description Minimum Maximum Input Parameters PCLK cycle time — PCLK high pulse duration — PCLK low pulse duration — Setup time from REQ valid to PCLK — falling edge Hold time from PCLK to REQ invalid —...
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Chapter 3 Timing Diagrams PCLK Data Out Valid Parameter Description Minimum Maximum Input Parameters Setup time from REQ valid to PCLK — Hold time from PCLK to REQ invalid — Output Parameters PCLK cycle time PCLK high pulse duration /2 – 5 /2 + 5 PCLK to ACK valid —...
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Using the 8255-Emulation Protocol Your NI 653X can perform handshaking I/O with devices that contain the 8255 chip, including the National Instruments NI PC-DIO-24/PnP, NI 650X family, and NI PC-DIO-96/PnP. Performing the 8255-emulation protocol with your NI 653X is similar to 8255 or 82C55 Programmable Peripheral Interface (PPI).
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Chapter 3 Timing Diagrams NI 653X terminology differs from 8255 terminology. • Input—The REQ line carries the 8255 STB (Strobe) input signal, and the NI 653X ACK line carries the 8255 IBF (Input Buffer Full) output signal. • Output—The REQ line carries the 8255 ACK input signal, and the NI 653X ACK line carries the 8255 OBF (Output Buffer Full) output signal.
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Chapter 3 Timing Diagrams ACK and REQ are shown as active low. Steps 1-6 are repeated for each transfer. Reference Point Action Steps When the NI 653X has data to output, it asserts the ACK signal, then waits for the peripheral device to assert REQ to indicate it is ready to accept data. The peripheral device asserts a REQ signal to accept the data.
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Chapter 3 Timing Diagrams Data In Valid doa* Data Out Valid ACK and REQ are shown as active low Parameter Description Minimum Maximum Input Parameters REQ low duration — REQ high duration — ACK falling edge to REQ rising edge —...
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Chapter 3 Timing Diagrams Initial State: ACK Cleared When REQ Asserted Wait Wait Programmable Delay Space Clear ACK When 6533 Device has space for data, input data.* Programmable Delay Send Wait When REQ Unasserted * With REQ-edge latching enabled, the data input is from the last active-going REQ edge.
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Chapter 3 Timing Diagrams Initial State ACK and REQ are shown as active high. Steps 1-4 are repeated for each transfer. Reference Point Action Steps Initial State ACK is deasserted. When the NI 653X has data to output, it drives the data onto the data lines, and then asserts ACK.
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Chapter 3 Timing Diagrams Using Protocols Based on Signal Edges The NI 653X can communicate using pulses on the ACK and REQ lines. The three edge protocols are: • Trailing-edge protocol—The trailing edge of the ACK or REQ pulse indicates that the NI 653X or peripheral device is ready for a transfer. •...
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Chapter 3 Timing Diagrams Initial State: ACK Cleared When REQ Asserted Wait Wait Programmable Delay Space When 6533 Device has space for data, input data.* Programmable Delay Clear Send Pulse Pulse Wait When REQ Unasserted * With REQ-edge latching enabled, the data input is from the last active-going REQ edge.
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Chapter 3 Timing Diagrams Initial State ACK and REQ are shown as active high. Steps 1-3 are repeated for each transfer. Reference Point Action Steps Initial State ACK is deasserted. The NI 653X sends the ACK pulse after driving output data to indicate that it has new, valid output data.
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Chapter 3 Timing Diagrams Using the Long-Pulse Protocol Initial State ACK and REQ are shown as active high. Steps 1-4 are repeated for each transfer. Reference Point Action Steps Initial State ACK is deasserted. The NI 653X waits for an active REQ to indicate that the peripheral device is ready.
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Appendix A Specifications Level (Continued) Input high current for control lines = 2.4 V) 200 µA CPULL high — CPULL low — 1.4 mA Input low current for CPULL/DPULL 4 µA = 0.4 V) — Input high current for CPULL/DPULL 140 µA = 2.4 V) —...
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Appendix A Specifications Power Requirement +5 VDC (±5%) (with light output load) NI PCI-DIO-32HS, NI PXI-6533 ...1.3 A NI PCI-6534 and NI PXI-6534....2.0 A NI DAQCard-6533 for PCMCIA ...500 mA Power Available at I/O Connector NI PCI-DIO-32HS, NI PXI-6533, NI AT-DIO-32HS, NI PCI-6534, and NI PXI-6534....+4.65 to +5.25 VDC at 1 A NI DAQCard-6533 for PCMCIA ...+4.65 to +5.25 VDC at 250 mA Physical...
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Appendix C Connecting Signals with Accessories Making 68-Pin Signal Connections Do not make connections that exceed any of the maximum input or output ratings Caution on the NI 653X, listed in Appendix A, Specifications. This includes connecting any power signals to ground and vice versa. Doing so may damage your device and your computer. NI is not liable for any damages resulting from these types of signal connections.
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Appendix C Connecting Signals with Accessories Table C-3. Signal Descriptions Signal Pins Signal Name Type Signal Description Based on Mode Used 2, 9 REQ<1..2> Control Group 1 and group 2 request lines Handshaking I/O—Request. A control line that indicates whether the peripheral device is ready to transfer data.
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NI DAQCard 6533. The female side of the R6850-D1 adapter connects directly to the NI 653X or PSHR68-68M cable. The male side of the adapter provides the pin assignments shown in Figure C-2. The 50-pin adapter has no +5 V, CPULL, or DPULL pins.
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Appendix D Hardware Considerations Table D-1. NI 653X Power Ratings (Continued) Device Power Rating NI PCI-6534 +4.65 to +5.25 VDC at 1 A NI PXI-6534 +4.65 to 5.25 VDC at 250 mA You can connect the +5 V pin to the CPULL and DPULL pins to control the bias of the NI 653X control and data lines, as described in the Power-On State...
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Appendix D Hardware Considerations 653 X Device Peripheral Device +5 V Data Control Line (Input) +5 V Data Control Line (Output) +5 V Data Control Line (Output) Figure D-5. Transmission Line Terminations Note Run the signal lines through special metal conduits to protect them from magnetic fields caused by electric motors, welding equipment, breakers, or transformers.
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The NI PCI-6534, NI PCI-DIO-32HS and NI AT-DIO-32HS each contain a RTSI connector and an interface to the National Instruments RTSI bus. The RTSI bus provides seven trigger lines and a system clock line. All NI AT- and PCI-bus devices that have RTSI bus connectors can be cabled together inside a computer to share these signals.
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Appendix E Optimizing Your Transfer Rates Table E-1. Peak Transfer Rates Based on Mode and Protocol Used (Continued) Mode/Protocol Peak Rate (MS/s) Handshaking Long Pulse 2.86 Handshaking Trailing-Edge Pulse 1.67 Handshaking Burst Pattern I/O Obtaining the Fastest Transfer Rates To achieve the highest transfer rates possible, consider the following: •...
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Appendix E Optimizing Your Transfer Rates • Continuous Retransmit Output (pattern I/O and burst protocol)—One buffer of data is loaded into memory one time, and output over and over again. • Continuous Input (pattern I/O and burst protocol)—New data is continually input into the application software.
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Appendix E Optimizing Your Transfer Rates NI PXI-6533 The following benchmarks are results using an NI PXI-8170 controller with an 850 MHz processor, 256 MB RAM, Windows 2000, LabVIEW 6.0, and NI-DAQ 6.9.2. Table E-5. NI PXI-6533 Benchmark Results Benchmark Rate (MS/s) Buffer 8-Bit...
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Appendix E Optimizing Your Transfer Rates NI PCI-6534 The following benchmarks are results using a Dell Optiplex GX150 with a 1 GHz processor, 256 MB RAM, Microsoft Windows 2000, LabVIEW 6.0, and NI-DAQ 6.9.2. Table E-7. NI PCI-6534 Benchmark Results Benchmark Rate (MS/s) Buffer...
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Appendix E Optimizing Your Transfer Rates NI PCI-7030/6533 with LabVIEW RT The following benchmarks are results using a 133 MHz AMD 486DX5 class processor and the real-time operating system running on LabVIEW RT. Table E-9. NI PCI-7030/6533 Benchmark Results Benchmark Rate (MS/s) 8-Bit 16-Bit...
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Technical Support and Professional Services Visit the following sections of the National Instruments Web site at for technical support and professional services: ni.com • Support—Online technical support resources at ni.com/support include the following: – Self-Help Resources—For answers and solutions, visit the...
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Appendix F Technical Support and Professional Services • Calibration Certificate—If your product supports calibration, you can obtain the calibration certificate for your product at ni.com/calibration If you searched and could not find the answers you need, contact ni.com your local office or NI corporate headquarters. Phone numbers for our worldwide offices are listed at the front of this manual.
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Glossary amps Acknowledge—handshaking signal driven by the NI 653X, indicating that it is ready to transfer data. Application Development Environment Application Programming Interface—a standardized set of subroutines or functions along with the parameters that a program can call. asynchronous For hardware, it is a property of an event that occurs at an arbitrary time, without synchronization to a reference clock.
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Glossary A plug-in data acquisition board, card, or pad that can contain multiple device channels and conversion devices. Plug-in boards, PCMCIA cards, and devices that connects to your computer parallel port, are all examples of DAQ devices. digital ground DGND digital trigger A TTL-level signal having two discrete levels—a high and a low level.
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Glossary mask The bits that are significant for pattern detection, also applies to change detection. most significant bit open collector Output driver that drives its output pin to 0 V for logic low, but puts the pin in the high-impedance state for logic high. pattern I/O Data-transfer mode in which NI 653X transfers data on the falling or rising edge of a TTL signal, typically at a constant rate.
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All handshaking I/O, pattern I/O and buffered operations must be performed on groups. RTSI bus Real-Time System Integration Bus—the National Instruments timing bus that connects DAQ devices directly, by means of connectors on top of the devices, for precise synchronization of functions...
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Glossary sample rate The number of samples a system takes over a given time period, usually expressed in samples per second. software trigger A programmed event that triggers an event such as data acquisition. static digital I/O See unstrobed digital I/O STOPTRIG control signals Strobed I/O...
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Index delay, programmable, handshaking protocol, 2-19 GND signal, description (table), C-5 diagnostic tools (NI resources), F-1 Group 1 and Group 2 digital I/O specifications, A-1 introduction, 1-2 digital lines. See static digital lines using control lines as extra unstrobed data digital patterns and waveforms.
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Index PXI-6533, PXI-6534, or PXI-7030/6533 devices, 1-7 LabVIEW and LabVIEW RT software, 1-3 software, 1-6 leading-edge handshaking protocol unpacking 653X devices, 1-6 comparison of protocols (table), 3-4 power connections, D-5 definition, 3-22 power-on state, D-5 input handshaking sequence RTSI and PXI trigger bus interfaces (figure), 3-27 board, RTSI, and PXI bus input state machine (figure), 3-28...
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See change detection port and timing controller combinations (table), 2-6 programming continuous, in NI-DAQ, 2-15 National Instruments support and services, F-1 LabVIEW/LabVIEW RT, 2-16 National Instruments, application single buffer, in NI-DAQ, 2-14 software, 1-3 REQ polarity, 2-7...
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Index installation, 1-7 programming support for DMA transfers (table), E-3 See also software programming choices PCLK<1..2> signal change detection burst input timing diagrams continuous change detection in NI-DAQ (figure), 2-34 default input timing diagram (figure), 3-7 LabVIEW/LabVIEW RT (figure), 2-35 PCLK reversed (figure), 3-9 single buffer change detection in transfer example (figure), 3-6...
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Index programming control/timing lines as extra voltage-controlled crystal oscillator unstrobed data lines, 2-5 (VCXO), D-11 flowcharts, 2-5 using control lines as extra unstrobed data lines, 2-3 when to use (table), 2-1 waveforms. See pattern I/O Web resources, F-1 NI 653X User Manual I-12 ni.com...
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