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Instruments Corporation. National Instruments respects the intellectual property of others, and we ask our users to do the same. NI software is protected by copyright and other intellectual property laws. Where NI software may be used to reproduce software or other materials belonging to others, you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction.
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These classes are known as Class A (for use in industrial commercial locations only) or Class B (for use in residential or commercial locations). All National Instruments (NI) products are FCC Class A products.
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Contents Chapter 2 Analog Input Analog Input Circuitry ....................2-1 Mux ......................... 2-1 Instrumentation Amplifier (NI-PGIA) ............2-2 A/D Converter....................2-2 AI FIFO......................2-2 Analog Trigger ....................2-2 AI Timing Signals ................... 2-2 Input Polarity and Range ....................2-2 Analog Input Terminal Configuration................2-5 Dither..........................
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Contents Chapter 7 Digital Routing Timing Signal Routing ....................7-1 Connecting Timing Signals ................... 7-4 Routing Signals in Software..................7-5 Chapter 8 Real-Time System Integration Bus (RTSI) RTSI Triggers........................ 8-1 PCI E Series Devices ..................8-1 PXI E Series Devices ..................8-2 Device and RTSI Clocks ....................
Start»All Programs»National Instruments»NI-DAQ»DAQ Getting Started Guide. The NI-DAQ Readme lists which devices are supported by this version of NI-DAQ. Select Start»All Programs»National Instruments»NI-DAQ» NI-DAQ Readme. The NI-DAQmx Help contains general information about measurement concepts, key NI-DAQmx concepts, and common applications that are applicable to all programming environments.
NI-DAQmx Base VI Reference Help. The NI-DAQmx Base C Reference Help contains C reference and general information about measurement concepts. Select Start»All Programs» National Instruments»NI-DAQmx Base»Documentation»C Function Reference Help. LabVIEW If you are a new user, use the Getting Started with LabVIEW manual to...
About This Manual programming concepts, step-by-step instructions for using LabVIEW, and reference information about LabVIEW VIs, functions, palettes, menus, and tools. Refer to the following locations on the Contents tab of the LabVIEW Help for information about NI-DAQmx: • Getting Started»Getting Started with DAQ—Includes overview information and a tutorial to learn how to take an NI-DAQmx measurement in LabVIEW using the DAQ Assistant.
Adobe Acrobat Reader with Search and Accessibility 5.0.5 or later installed to view the PDFs. Refer to the Adobe Systems Incorporated Web site at to download Acrobat Reader. Refer to the www.adobe.com National Instruments Product Manuals Library at ni.com/manuals updated documentation resources. E Series User Manual ni.com...
Chapter 1 DAQ System Overview DAQ-STC E Series devices use the National Instruments DAQ system timing controller (DAQ-STC) for time-related functions. The DAQ-STC consists of the following timing groups. • AI—Two 24-bit, two 16-bit counters AO—Three 24-bit, one 16-bit counter •...
The accuracy specifications of your device change depending on how long it has been since your last external calibration. National Instruments recommends that you calibrate your device at least as often as the intervals listed in the accuracy specifications.
Taking Measurements book on the Contents tab. • If you are using other application software, refer to Common Sensors in the NI-DAQmx Help, which you can access from Start»All Programs»National Instruments»NI-DAQ»NI-DAQmx Help, or the LabVIEW 8.x Help. Signal Conditioning Options SCXI SCXI is a front-end signal conditioning and switching system for various measurement devices, including E Series devices.
5B is a front-end signal conditioning system for plug-in data acquisition devices. A 5B system consists of eight or 16 single-channel modules that plug into a backplane for conditioning thermocouples and other analog signals. National Instruments offers a complete line of 5B modules, carriers, backplanes, and accessories. Note For more information about SCXI, SCC, and 5B series products, refer to ni.com/...
Specifications and Manufacturers for Board Mating Connectors. Programming Devices in Software National Instruments measurement devices are packaged with NI-DAQ driver software, an extensive library of functions and VIs you can call from your application software, such as LabVIEW or LabWindows/CVI, to program all the features of your NI measurement devices.
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Chapter 1 DAQ System Overview Table 1-4. I/O Connector Signal Descriptions (Continued) Signal Name Reference Direction Description D GND — — Digital Ground—These pins supply the reference for the digital signals at the I/O connector as well as the +5 VDC supply.
Ctr0Out signal also is driven to the User 1 BNC. Terminal Name Equivalents With NI-DAQmx, National Instruments has revised its terminal names so they are easier to understand and more consistent among National Instruments hardware and software products. The revised terminal names used in this document are usually similar to the names they replace.
Chapter 1 DAQ System Overview Table 1-5. Terminal Name Equivalents (Continued) Traditional NI-DAQ (Legacy) NI-DAQmx REQ# PFI # SCANCLK AI HOLD COMP or AI HOLD SISOURCE AI Sample Clock Timebase STARTSCAN AI SAMP CLK or AI SAMP STOPTRIG# PFI # TRIG1 AI START TRIG or AI START TRIG2...
Chapter 2 Analog Input Instrumentation Amplifier (NI-PGIA) The NI programmable gain instrumentation amplifier (NI-PGIA) is a measurement and instrument class amplifier that guarantees minimum settling times at all gains. The NI-PGIA can amplify or attenuate an AI signal to ensure that you use the maximum resolution of the ADC. E Series devices use the NI-PGIA to deliver full 16- and 12-bit accuracy when sampling multiple channels at high gains and fast rates.
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Chapter 2 Analog Input Table 2-1. Input Ranges for NI 6020E, NI 6040E, NI 6052E, NI 6062E, and NI 6070E/6071E (Continued) Precision NI 6070E/ Input Range Gain Polarity NI 6020E NI 6040E NI 6052E NI 6062E 6071E –10 to +10 V Bipolar 4.88 mV 4.88 mV...
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Chapter 2 Analog Input The single-ended input configurations provide up to 16 channels (64 channels on the NI 6031E, NI 6033E, and NI 6071E). The DIFF input configuration provides up to eight channels (32 channels on the NI 6031E, NI 6033E, and NI 6071E). Input modes are programmed on a per channel basis for multi-mode scanning.
Chapter 2 Analog Input Dither With 12-bit E Series devices, you can improve resolution by enabling the Gaussian dither generator and averaging acquired samples. Dithering is a feature on all 12-bit E Series devices. When you enable dithering, you add approximately 0.5 LSB of white Gaussian noise to the signal to be converted by the ADC.
Chapter 2 Analog Input E Series devices are designed to have fast settling times. Several factors can increase the settling time, which decreases the accuracy of your measurements. To ensure fast settling times, you should (in order of importance): • Use Low Impedance Sources •...
The capacitance of the cable can also effectively increase the settling time. National Instruments recommends using individually shielded, twisted-pair wires that are 2 m or less to connect AI signals to the device.
Chapter 2 Analog Input Connect channel 2 to AI GND (or you can use the internal ground signal; refer to Internal Channels for E Series Devices in the NI-DAQmx Help or the LabVIEW 8.x Help. Set the input range of channel 2 to 0–100 mV to match channel 1.
Chapter 2 Analog Input Buffered In a buffered acquisition, data is moved from the DAQ device onboard FIFO memory to a PC buffer using DMA or interrupts before it is transferred to ADE memory. Buffered acquisitions typically allow for much faster transfer rates than non-buffered acquisitions because data is moved in large blocks, rather than one point at a time.
Chapter 2 Analog Input Outputting the AI Start Trigger Signal You can configure the PFI 0/AI START TRIG pin to output the ai/StartTrigger signal. The output pin reflects the ai/StartTrigger signal regardless of what signal you specify as its source. The output is an active high pulse.
Chapter 2 Analog Input Using a Digital Source To use ai/ReferenceTrigger with a digital source, specify a source and an edge. The source can be an external signal connected to any PFI or RTSI <0..6> pin. The source can also be one of several internal signals on your DAQ device.
Chapter 2 Analog Input Connecting Analog Input Signals The following sections discuss the types of signal sources, specify the use of single-ended and DIFF measurements, and provide recommendations for measuring both floating and ground-referenced signal sources. Table 2-6 summarizes the recommended input configuration for both types of signal sources.
Chapter 2 Analog Input Types of Signal Sources When configuring the input channels and making signal connections, first determine whether the signal sources are floating or ground-referenced. Floating Signal Sources A floating signal source is not connected to the building ground system, but has an isolated ground-reference point.
Chapter 2 Analog Input With this type of connection, the PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground, shown as V in this figure. Common-Mode Signal Rejection Considerations Ground-referenced signal sources with differential connections to the device are referenced to some ground point with respect to the device.
Chapter 2 Analog Input Single-Ended Connection Considerations A single-ended connection is one in which the device AI signal is referenced to a ground that it can share with other input signals. The input signal connects to the positive input of the PGIA, and the ground connects to the negative input of the PGIA.
Chapter 2 Analog Input I/O Connector AI <0..15> Instrumentation Ground- Amplifier Referenced Signal – Source PGIA Input Multiplexers Measured – Common- AI SENSE Voltage Mode AI GND Noise – – and Ground Potential E Series Device Configured in NRSE Mode Figure 2-12.
Chapter 2 Analog Input Figure 2-14. NI-DAQmx Create Virtual Channel.vi Analog Input Timing Signals In order to provide all of the timing functionality described throughout this section, the DAQ-STC provides an extremely powerful and flexible timing engine. Figure 2-15 summarizes all of the clock routing and timing options provided by the analog input timing engine.
Chapter 2 Analog Input An acquisition with pretrigger data allows you to view data that is acquired before the trigger of interest, in addition to data acquired after the trigger. Figure 2-18 shows a typical pretrigger DAQ sequence. The ai/StartTrigger signal can be either a hardware or software signal.
Chapter 2 Analog Input The output is an active high pulse. Figure 2-20 shows the timing behavior of the PFI 0/AI START TRIG pin configured as an output. = 50 to 100 ns Figure 2-20. PFI 0/AI START TRIG Timing Behavior The PFI 0/AI START TRIG pin is configured as an input by default.
Chapter 2 Analog Input Using an Analog Source When you use an analog trigger source, the acquisition stops on the first rising edge of the Analog Comparison Event signal. Refer to Chapter 10, Triggering, for more information on analog triggering. Outputting the AI Reference Trigger Signal You can configure the PFI 1/AI REF TRIG pin to output the ai/ReferenceTrigger signal.
Chapter 2 Analog Input Rising-Edge Polarity Falling-Edge Polarity = 10 ns minimum Figure 2-24. ai/SampleClock Timing Requirements Outputting the AI Sample Clock Signal You can configure the PFI 7/AI SAMP CLK pin to output the ai/SampleClock signal. The output pin reflects the ai/SampleClock signal regardless of what signal you specify as its source.
Chapter 2 Analog Input Figure 2-27 shows the relationship of the ai/SampleClock signal to the ai/StartTrigger signal. ai/SampleClockTimebase ai/StartTrigger ai/SampleClock Delay From Start Trigger Figure 2-27. ai/SampleClock and ai/StartTrigger AI Sample Clock Timebase Signal Any PFI can externally input the AI Sample Clock Timebase (ai/SampleClockTimebase) signal, which is not available as an output on the I/O connector.
Chapter 2 Analog Input Using an External Source You can use a signal connected to any PFI or RTSI <0..6> pin as the source of ai/ConvertClock. Figure 2-29 shows the timing requirements of the ai/ConvertClock source. Rising-Edge Polarity Falling-Edge Polarity = 10 ns minimum Figure 2-29.
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Chapter 2 Analog Input ai/SampleClock ai/ConvertClock Sample Clock too fast for Convert Clock. Sample Clock pulses are gated off. ai/SampleClock ai/ConvertClock Convert Clock too fast for Sample Clock. Convert Clock pulses are gated off. ai/SampleClock ai/ConvertClock Improperly matched Sample Clock and Convert Clock. Leads to aperiodic sampling.
Chapter 2 Analog Input AI Hold Complete Event Signal AI Hold Complete Event (ai/HoldCompleteEvent) is an output-only signal that generates a pulse with the leading edge occurring approximately 50 to 100 ns after an A/D conversion begins. The polarity of this output is software-selectable, but is typically configured so that a low-to-high leading edge can clock external AI multiplexers indicating when the input signal has been sampled and can be removed.
Chapter 3 Analog Output AO Sample Clock The DAC reads a sample from the FIFO with every cycle of the AO Sample Clock signal and generates the AO voltage. Polarity and Reference Selection Polarity and reference selection allow you to set the AO range. Refer to Table 3-1 to set the range for your device.
Chapter 3 Analog Output AO Data Generation Methods When performing an analog output operation, there are several different data generation methods available. You can either perform software-timed or hardware-timed generations. Hardware-timed generations can be non-buffered or buffered. Software-Timed Generations With a software-timed generation, software controls the rate at which data is generated.
Chapter 3 Analog Output AO Start Trigger Signal You can use the AO Start Trigger (ao/StartTrigger) signal to initiate a waveform generation. If you do not use triggers, you begin a generation with a software command. Using a Digital Source To use ao/StartTrigger, specify a source and an edge.
Chapter 3 Analog Output Connecting Analog Output Signals The AO signals are AO 0, AO 1, and AO GND. AO 0 is the voltage output signal for AO channel 0. AO 1 is the voltage output signal for AO channel 1. AO GND is the ground reference signal for both AO channels and the external reference signal.
Chapter 3 Analog Output Using an Analog Source When you use an analog trigger source, the waveform generation begins on the first rising edge of the Analog Comparison Event signal. Refer to Chapter 10, Triggering, for more information on analog triggering. Outputting the AO Start Trigger Signal You can configure the PFI 6/AO START TRIG pin to output the ao/StartTrigger signal.
Chapter 3 Analog Output Outputting the AO Sample Clock Signal You can configure the PFI 5/AO SAMP CLK pin to output the ao/SampleClock signal. The output pin reflects the ao/SampleClock signal regardless of what signal you specify as its source. The output is an active high pulse.
Chapter 3 Analog Output Figure 3-11 shows the timing requirements for the ao/SampleClockTimebase signal. = 50 ns minimum = 23 ns minimum Figure 3-11. ao/SampleClockTimebase Signal Timing Requirements The maximum allowed frequency is 20 MHz, with a minimum pulse width of 10 ns high or low.
Chapter 4 Digital I/O or output. At system startup and reset, the DIO ports are all high-impedance. The hardware up/down control for general-purpose Counters 0 and 1 are connected onboard to P0.6 and P0.7, respectively. Thus, you can use P0.6 and P0.7 to control the general-purpose counters.
Chapter 4 Digital I/O voltage across the pull-down resistor above a TTL-low level of 0.4 VDC. Figure 4-2 shows the DIO configuration for high DIO power-on state. Device +5 V 100 k 82C55 Digital I/O Line Figure 4-2. DIO Configuration for High DIO Power-On State The following steps show how to calculate the value of R needed to achieve a TTL-low power-on state for a single DIO line.
Chapter 4 Digital I/O Mode 1 Input Timing (NI 6016 and NI 6025E Devices Only) Figure 4-3 and Table 4-3 show timing specifications for an input transfer in mode 1. STB* INTR DATA Figure 4-3. Input Transfer in Mode 1 Timing Specifications Table 4-3.
Chapter 4 Digital I/O Mode 2 Bidirectional Timing (NI 6016 and NI 6025E Devices Only) Figure 4-5 and Table 4-5 show timing specifications for a bidirectional transfer in mode 2. WR * OBF * INTR ACK * STB * RD * DATA Figure 4-5.
Chapter 4 Digital I/O +5 V P0.<4..7> TTL Signal P0.<0..3> +5 V Switch D GND I/O Connector E Series Device Figure 4-6. P0.<0..3> Configured for Digital Input, P0.<4..7> Configured for Digital Output Caution Exceeding the maximum input voltage ratings, which are listed in the I/O Terminal Summary table in the specifications document for each E Series family, can damage the DAQ device and the computer.
Chapter 5 Counters Pause Trigger You can use pause triggers in edge counting and continuous pulse generation applications. For edge counting acquisitions, the counter stops counting edges while the external trigger signal is low and resumes when the signal goes high or vice versa. For continuous pulse generations, the counter stops generating pulses while the external trigger signal is low and resumes when the signal goes high or vice versa.
Chapter 5 Counters The maximum allowed frequency is 20 MHz, with a minimum pulse width of 10 ns high or low. There is no minimum frequency. For most applications, unless you select an external source, the 20MHzTimebase signal or the 100kHzTimebase signal generates the Ctr0Source signal.
Chapter 5 Counters CTR 0 OUT Pin When the CTR 0 OUT pin is configured as an output, the Ctr0InternalOutput signal drives the pin. As an input, CTR 0 OUT can drive any of the RTSI <0..6> signals. CTR 0 OUT is set to high-impedance at startup.
Chapter 5 Counters Figure 5-8 shows the timing requirements for the Ctr1Gate signal. Rising-Edge Polarity Falling-Edge Polarity = 10 ns minimum Figure 5-8. Ctr1Gate Signal Timing Requirements Counter 1 Internal Output Signal The Counter 1 Internal Output (Ctr1InternalOutput) signal is the output of Counter 1.
Chapter 5 Counters Figure 5-10 shows the timing requirements for MasterTimebase. = 50 ns minimum = 23 ns minimum Figure 5-10. MasterTimebase Timing Requirements Getting Started with Counter Applications in Software You can use the E Series device in the following counter-based applications.
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Chapter 6 Programmable Function Interfaces (PFI) Not all timing signals can be output. PFI pins are labeled with the timing signal that can be output on it. For example, PFI 8 is labeled PFI 8/CTR 0 Source. The following timing signals can be output on PFI pins: •...
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Chapter 7 Digital Routing • AO Start Trigger Signal • AO Sample Clock Signal • AO Pause Trigger Signal • AO Sample Clock Timebase Signal • Counter 0 Source Signal • Counter 0 Gate Signal • Counter 0 Up/Down Signal •...
Chapter 7 Digital Routing Connecting Timing Signals Caution Exceeding the maximum input voltage ratings, which are listed in the I/O Terminal Summary table in the specifications document for each E Series family, can damage the DAQ device and the computer. NI is not liable for any damage resulting from such signal connections.
Chapter 8 Real-Time System Integration Bus (RTSI) Device and RTSI Clocks Many E Series device functions require a frequency timebase to generate the necessary timing signals for controlling A/D conversions, DAC updates, or general-purpose signals at the I/O connector. This timebase is also called the Master Timebase or Onboard Clock.
DMA is a method to transfer data between the device and computer memory without the involvement of the CPU. This method makes DMA the fastest available data transfer method. National Instruments uses DMA hardware and software technology to achieve high throughput rates and to increase system utilization.
Chapter 10 Triggering Figure 10-1 shows a falling-edge trigger. Digital Trigger Falling edge initiates acquisition Figure 10-1. Falling-Edge Trigger You can also program your DAQ device to perform an action in response to a trigger from a digital source. This action can affect the following: •...
Chapter 10 Triggering Analog Trigger Types You can configure the analog trigger circuitry to different triggering modes. Refer to the section for more Triggering with an Analog Source information. Level Triggering You can configure the analog trigger circuitry to detect when the analog signal is below or above a level you specify.
Chapter 10 Triggering Figure 10-7 demonstrates a trigger that asserts when the signal enters the window. Bottom Analog Comparison Event Figure 10-7. Window Triggering Analog Trigger Accuracy The analog trigger circuitry compares the voltage of the trigger source to the output of programmable trigger DACs. When you configure the level (or the high and low limits in window trigger mode), the device adjusts the output of the trigger DACs.
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Appendix A Device-Specific Information NI 6011E (NI PCI-MIO-16XE-50) Dither You cannot disable dither on the NI 6011E (NI PCI-MIO-16XE-50). The ADC resolution on this device is so fine that the ADC and the PGIA inherently produce almost 0.5 LSB of noise. This configuration is equivalent to having a dither circuit that is always enabled.
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information NI 6013/6014 Block Diagram Figure A-3 shows a block diagram of the NI 6013/6014. Voltage Calibration EEPROM DACs Control Analog Generic Analog Mode PCI/PXI MINI- Input PGIA Multiplexer Data MITE FIFO Converter Muxes Interface Interface Address/ Data Configuration AI Control...
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Appendix A Device-Specific Information NI 6014 Pinout Figure A-5 shows the NI 6014 device pinout. Note Some hardware accessories may not yet reflect the NI-DAQmx terminal names. If you are using an E Series device in Traditional NI-DAQ (Legacy), refer to Table 1-5, Terminal Name Equivalents, for the Traditional NI-DAQ (Legacy) signal names.
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Appendix A Device-Specific Information NI 6015/6016 Family The DAQPad-6015/6016 are Plug-and-Play, USB-compatible multifunction AI, AO, DIO, and TIO devices for USB-compatible computers. The DAQPad-6015/6016 family of devices features the following: • 16 AI channels (eight differential) with 16-bit resolution • Two AO channels with 16-bit resolution •...
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Appendix A Device-Specific Information DAQPad-6015/6016 Block Diagram Figure A-6 shows a block diagram of the DAQPad-6015/6016. Voltage Calibration DACs Data Analog Analog Input Data Mode PGIA Microcontroller Converter Multiplexer FIFO Multiplexer – Program SRAM Config Firmware EEPROM Flash Config AI Control CPLD Memory Calibrate...
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Appendix A Device-Specific Information AI x + AI x – 0.1 µF 5 kΩ AI GND Figure A-8. BNC DAQPad Analog Input Circuitry Single-Ended Signals For each BNC connector that you use for two single-ended channels, set the source type switch to the GS position. This setting disconnects the built-in ground reference resistor from the negative terminal of the BNC connector, allowing the connector to be used as a single-ended channel, as shown in Figure A-9.
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Appendix A Device-Specific Information User <1..2> The User <1..2> signals connect directly from a screw terminal to a BNC. They allow you to use a BNC connector for a digital or timing I/O signal of your choice. The USER 1 BNC is internally connected to pin 21 and the USER 2 BNC is internally connected to pin 22 on the 30-pin I/O connector.
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Both LEDs blinking in the same pattern simultaneously indicates an error state. You must power off and power on your device. Blinking alternately If both LEDs blink in the same pattern alternately, contact National Instruments. E Series User Manual A-18 ni.com...
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Appendix A Device-Specific Information Figure A-17. DAQPad-6015 Mass Termination Device DAQPad-6015/6016 Specifications Refer to the NI DAQPad-6015/6016 Family Specifications for more detailed information on the devices. E Series User Manual A-20 ni.com...
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Appendix A Device-Specific Information NI DAQPad-6015 BNC Pinout Figure A-19 shows the NI DAQPad-6015 BNC device pinout. Note Some hardware accessories may not yet reflect the NI-DAQmx terminal names. If you are using an E Series device in Traditional NI-DAQ (Legacy), refer to Table 1-5, Terminal Name Equivalents, for the Traditional NI-DAQ (Legacy) signal names.
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Appendix A Device-Specific Information NI DAQPad-6016 Pinout Figure A-21 shows the NI DAQPad-6016 device pinout. Note Some hardware accessories may not yet reflect the NI-DAQmx terminal names. If you are using an E Series device in Traditional NI-DAQ (Legacy), refer to Table 1-5, Terminal Name Equivalents, for the Traditional NI-DAQ (Legacy) signal names.
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Appendix A Device-Specific Information DAQPad-6020E Block Diagram Figure A-22 shows a block diagram of the DAQPad-6020E. Calibration Voltage DACs 12-Bit Analog Mux Mode NI-PGIA Sampling Selection Gain Data Interface Port Muxes Switches FIFO Amplifier Transceivers Converter USB Micro – Controller Interrupt Dither EEPROM...
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Appendix A Device-Specific Information Single-Ended Signals For each BNC connector that you use for two single-ended channels, set the source type switch to the GS position. This setting disconnects the built-in ground reference resistor from the negative terminal of the BNC connector, allowing the connector to be used as a single-ended channel, as shown in Figure A-25.
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Appendix A Device-Specific Information User <1..2> The User <1..2> signals connect directly from a screw terminal to a BNC. They allow you to use a BNC connector for a digital or timing I/O signal of your choice. The USER 1 BNC is internally connected to pin 21 and the USER 2 BNC is internally connected to pin 22 on the 30-pin I/O connector.
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DAQPad but cannot configure it. This problem arises if NI-DAQ is not properly installed, or there are no system resources available. 4 blinks If this pattern is displayed, contact National Instruments. DAQPad-6020E Specifications Refer to the NI DAQPad-6020E Family Specifications for more detailed information on the devices.
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Appendix A Device-Specific Information NI DAQPad-6020E BNC Pinout Figure A-34 shows the NI DAQPad-6020E BNC device pinout. Note Some hardware accessories may not yet reflect the NI-DAQmx terminal names. If you are using an E Series device in Traditional NI-DAQ (Legacy), refer to Table 1-5, Terminal Name Equivalents, for the Traditional NI-DAQ (Legacy) signal names.
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Appendix A Device-Specific Information NI 6023E/6024E/6025E Block Diagrams Figure A-35 shows a block diagram of the NI PCI-6023E/6024E/6025E and the NI PXI-6025E. Voltage Calibration EEPROM DACs Control Generic Analog Analog MITE Mode Data PGIA Interface Muxes Interface Converter FIFO Multiplexer Address/Data Calibration Dither...
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information AI GND P3.7 AI GND D GND AI 0 P3.6 AI 8 D GND AI 1 P3.5 AI 9 D GND AI 2 P3.4 AI 10 D GND AI 3 P3.3 AI 11 D GND AI 4 P3.2 AI 12 D GND...
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Appendix A Device-Specific Information NI 6030E/6031E/6032E/6033E Dither You cannot disable dither on the NI 6030E/6031E/6032E/6033E. The ADC resolution is so fine that the ADC and the PGIA inherently produce almost 0.5 LSB of noise. This configuration is equivalent to having a dither circuit that is always enabled.
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information AI GND AI 16 AI GND AI 24 AI 0 AI 17 AI 8 AI 25 AI 1 AI 18 AI 9 AI 26 AI 2 AI 19 AI 10 AI 27 AI 3 AI 20 AI 11 AI 28 AI 4...
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information AI GND AI 16 AI GND AI 24 AI 0 AI 17 AI 8 AI 25 AI 1 AI 18 AI 9 AI 26 AI 2 AI 19 AI 10 AI 27 AI 3 AI 20 AI 11 AI 28 AI 4...
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Appendix A Device-Specific Information NI 6034E/6035E/6036E Block Diagrams Figure A-47 shows the block diagram of the NI PCI-6034E/6035E/6036E. EEPROM Calibration Voltage DACs Control Analog Analog Generic MINI- Mode Input NI-PGIA MITE Data Multiplexers FIFO Muxes Converter Interface Interface Address/Data Calibration Configuration AI Control EEPROM...
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Data (16) FIFO DAC1 RTSI Calibration DACs *(32) for the PXI-6071E Figure A-52. NI PXI-6040E Block Diagram NI 6040E Pinout Figure A-53 shows the NI 6040E device pinout. Note Some hardware accessories may not yet reflect the NI-DAQmx terminal names. If...
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Appendix A Device-Specific Information PCI-MIO-16E-4 The PCI-MIO-16E-4 is a Plug-and-Play, multifunction AI, AO, DIO, and TIO device for PCI bus computers. The PCI-MIO-16E-4 features the following: • 16 AI channels (eight differential) with 16-bit resolution • Two AO channels with 12-bit resolution •...
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information There are two versions of the NI DAQPad-6052E. Table A-5 illustrates the different I/O connectivity and form factors of each version. Table A-5. NI DAQPad-6052E Versions Model I/O Connector Form Factor DAQPad-6052E 68-pin SCSI-II male Full-size box (12.1 in.
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Appendix A Device-Specific Information Differential Signals To connect differential signals, determine the type of signal source you are using: a floating signal source or a ground-referenced signal source. Refer to the Differential Connection Considerations Connecting Analog Input Signals sections of Chapter 2, Analog Input, for more information on AI signals.
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Appendix A Device-Specific Information Refer to the Connecting Analog Output Signals section of Chapter 3, Analog Output, for more information. AO External Reference The AO EXT REF input controls the voltage range of analog output signals. Figure A-61 shows circuitry of the AO EXT REF on BNC DAQPads. AO EXT REF AI GND Figure A-61.
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Appendix A Device-Specific Information Other Signals You can access other signals on BNC DAQPads through a 30-pin Combicon connector. To connect to one of these signals, use a small screwdriver to press down the orange spring release button at a terminal and insert a wire. Releasing the orange spring release button will lock the wire securely in place.
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information • Two 24-bit counter/timers for TIO • A 68-pin I/O connector Because the NI 6052E devices have no DIP switches, jumpers, or potentiometers, you can easily configure and calibrate them through software. NI PCI/PXI-6052E Block Diagram Figure A-69 shows a block diagram of the NI PCI/PXI-6052E.
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Appendix A Device-Specific Information NI 6052E Family Specifications Refer to the NI 6052E Family Specifications for more detailed information on the devices. NI DAQCard-6062E The DAQCard-6062E is a multifunction AI, AO, DIO, and TIO DAQ device for computers equipped with Type II PCMCIA slots. The DAQCard-6062E features the following: •...
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information Table A-7. NI DAQPad-6070E Versions DAQ Device I/O Connector Form Factor DAQPad-6070E 68-pin SCSI-II male Full-size box (12.1 in. × 10 in. × 1.7 in.) Rack-mountable, stackable DAQPad-6070E BNC BNC and removable screw Full-size box terminals (12.1 in.
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Appendix A Device-Specific Information Differential Signals To connect differential signals, determine the type of signal source you are using: a floating signal source or a ground-referenced signal source. Refer to the Differential Connection Considerations Connecting Analog Input Signals sections of Chapter 2, Analog Input, for more information.
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Appendix A Device-Specific Information Refer to the Connecting Analog Output Signals section of Chapter 3, Analog Output, for more information. AO External Reference The AO EXT REF input controls the voltage range of analog output signals. Figure A-78 shows circuitry of the AO EXT REF on BNC DAQPads. AO EXT REF AI GND Figure A-78.
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Appendix A Device-Specific Information You can remove the Combicon plugs to assist in connecting wires. Loosening the screws on either side of the two Combicon plugs allows you to detach the Combicon plugs from the BNC DAQPad device, as shown in Figure A-83.
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Appendix A Device-Specific Information PFI 9 P0.7 PFI 8 P0.6 PFI 7 P0.5 PFI 6 P0.4 PFI 5 P0.3 PFI 4 P0.2 PFI 3 P0.1 PFI 2 P0.0 PFI 1 CTR 1 OUT D GND D GND USER 2 USER 1 FREQ OUT AI HOLD COMP +5 V...
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Data (16) FIFO DAC1 RTSI Calibration DACs *(32) for the PXI-6071E Figure A-85. NI 6070E/6071E Block Diagram NI PCI/PXI-6070E Pinout Figure A-86 shows the NI 6070E device pinout. Note Some hardware accessories may not yet reflect the NI-DAQmx terminal names. If you are using an E Series device in Traditional NI-DAQ (Legacy), refer to Table 1-5, Equivalents, for the Traditional NI-DAQ (Legacy) signal names.
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Appendix A Device-Specific Information AI 8 AI 0 AI 1 AI GND AI GND AI 9 AI 10 AI 2 AI 3 AI GND AI GND AI 11 AI 4 AI SENSE AI GND AI 12 AI 13 AI 5 AI 6 AI GND AI GND...
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Appendix A Device-Specific Information AI GND AI 16 AI GND AI 24 AI 0 AI 17 AI 8 AI 25 AI 1 AI 18 AI 9 AI 26 AI 2 AI 19 AI 27 AI 10 AI 3 AI 20 AI 11 AI 28 AI 4...
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Appendix A Device-Specific Information PCI-MIO-16E-1 Block Diagram Figure A-88 shows a block diagram of the PCI-MIO-16E-1. Voltage Calibration DACs Control (8)* Generic 12-Bit Analog Mux Mode NI-PGIA MITE Sampling Selection Gain Interface Muxes Interface FIFO Switches (8)* Amplifier Address/Data Converter –...
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Appendix A Device-Specific Information NI 6070E/6071E Specifications Refer to the NI 6070E/6071E Family Specifications for more detailed information on the devices. E Series User Manual A-102 ni.com...
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Appendix B I/O Connector Pinouts Table B-1. E Series I/O Connector Pinouts (Continued) E Series Device Typical Cable Accessory NI 6030E SH6868EP Refer to Figure A-42. SH6850 Refer to Figure B-4. NI 6031E SH1006868 Refer to Figure B-1. SH100100 Refer to Figure A-44. R1005050 Refer to Figure B-3.
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Appendix B I/O Connector Pinouts MIO-16 Connector Extended I/O Connector AI 8 AI 0 AI 24 AI 16 AI 1 AI GND AI 17 AI 25 AI GND AI 9 AI 18 AI 26 AI 10 AI 2 AI 27 AI 19 AI 3 AI GND...
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Appendix B I/O Connector Pinouts 100-50-50-Pin 100-50-50-Pin Extended AI I/O Connector Pinout When you use the NI 6025E with an R1005050 cable assembly, the signals appear on two 50-pin connectors. Figure B-3 shows the pinouts of the 50-pin connectors. E Series User Manual ni.com...
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Appendix B I/O Connector Pinouts 50-Pin MIO I/O Connector Pinout Figure B-4 shows the 50-pin I/O connector that is available when you use the R6850 or SH6850 cable assemblies with 68-pin E Series devices. AI GND AI GND AI 0 AI 8 AI 1 AI 9...
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Troubleshooting This appendix contains some common questions about E Series devices. If your questions are not answered here, refer to the National Instruments KnowledgeBase at . It contains thousands of documents that ni.com answer frequently asked questions about NI products.
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Appendix C Troubleshooting reference the signal to the same ground level as the device reference. There are various methods of achieving this reference while maintaining a high common-mode Rejection Ratio (CMRR). These methods are outlined in Connecting Analog Input Signals section of Chapter 2, Analog Input.
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E Series devices. The National Instruments Measurement Hardware DDK provides development tools and a register-level programming interface for NI data acquisition hardware. The NI Measurement Hardware DDK provides access to the full register map of each device and offers examples for completing common measurement and control functions.
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Technical Support and Professional Services Visit the following sections of the National Instruments Web site at for technical support and professional services: ni.com • Support—Online technical support resources at ni.com/support include the following: – Self-Help Resources—For answers and solutions, visit the...
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Appendix D Technical Support and Professional Services Calibration Certificate—If your product supports calibration, • you can obtain the calibration certificate for your product at ni.com/calibration If you searched and could not find the answers you need, contact ni.com your local office or NI corporate headquarters. Phone numbers for our worldwide offices are listed at the front of this manual.
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Glossary AI SENSE Analog input sense signal. Analog output. AO 0 Analog channel 0 output signal. AO 1 Analog channel 1 output signal. AO GND Analog output ground signal. bipolar A signal range that includes both positive and negative values (for example, −5 to +5 V).
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A board assembly and its associated mechanical parts, front panel, optional shields, and so on. A module contains everything required to occupy one or more slots in a mainframe. SCXI and PXI devices are modules. National Instruments. NI-DAQ Driver software included with all NI measurement devices. NI-DAQ is an...
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Glossary RTSI Real-Time System Integration—the National Instruments timing bus that connects DAQ devices directly, by means of connectors on top of the devices, for precise synchronization of functions. Seconds. Samples. Samples per second—Used to express the rate at which a digitizer or D/A converter or DAQ device samples an analog signal.
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Index NI 6036E, A-61, A-62 pinout, A-62 National Instruments support and NI 6040E, A-64 services, D-1 family, A-63, A-69 NI 6011E, A-1, A-2, A-3 NI 6040E (NI PCI-MIO-16E-4), A-67, A-68 NI 6011E (NI PCI-MIO-16XE-50), A-1, A-3 NI 6052E, A-77, A-78, A-79, A-80, A-81...
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