HP 1660C Series Service Manual page 212

Theory of Operation
The HP 1660C/CS/CP Series Logic Analyzer
HP 1660C/CS/CP Series Theory
CPU Board
The microprocessor is a Motorola 68EC020 running at 25 MHz. The microprocessor controls
all of the functions of the logic analyzer including processing and storing data, displaying data,
and configuring the acquisition ICs to obtain and store data.
System Memory
The system memory is made up of both read-only memory (ROM) and random access memory
(RAM). Two types of ROM are used. A single 128Kx8 EPROM is used as a boot ROM, and
four 512Kx8 Flash ROMS are configured to provide a 512Kx32 Flash ROM space. One SIMM
socket supports 2-MB, 4-MB, or 8-MB SIMM.
On power-up, instructions in the boot ROM command the instrument to execute its boot
routine. The boot routine includes power-up operation verification of the instrument
subsystems and entering the operating system. The CPU searches for the operating system
on Flash ROM. Then, if the operating system is in Flash ROM, the instrument will be
initialized with the default configuration and await front panel instructions from you. If the
operating system is not in Flash ROM, the CPU accesses the disk drives to see if the operating
system is on the disks.
The DRAM stores the instrument configuration, acquired data to be processed, and any
inverse assembler loaded in the instrument by the user.
CRT Controller and Display RAM
A Brooktree BT475 RAMDAC color palette and a National Semiconductor LM1882CM video
frame generator control the CRT. One of the RGB outputs of the color palette provides the
eight-shade gray scale display. The video frame generator provides the horizontal and vertical
synchronization timing signals.
The display RAM is a 256Kx8 video RAM and stores all of the pixel information used by the
color palette. A serial address counter and an address multiplexer control the DRAM
addressing. At the conclusion of each video frame the vertical sync signal from the video
generator resets the serial address counter and a new frame is generated.
Disk Drive Controller
The disk drive controller consists of a single floppy drive controller IC. The floppy drive
controller provides all signals to the disk drive including read and write data, read and write
signals, write gate, and step signal. The floppy drive controller also reads status signals from
the disk drive, including a track 00 signal, disk ready, and disk change signal.
Keypad and Knob Interface
The front panel keypad is scanned directly from the microprocessor address bus during the
video blanking cycle of the CRT. When a front panel key is pressed the associated address
bits are fed to the data bus through the pressed key and read by the microprocessor.
The rotary pulse generator (RPG) knob is part of the PS2 circuitry. Pulses and direction of
rotation information are directed to an RPG interface IC and then to the PS2 loop. The
microprocessor then reads and interprets the RPG signals and performs the desired tasks.
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