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22 HW Processor (HWP) and Sound Output (SDAC2)
Flash check
The following shows the procedure to execute a Flash check:
1. Confirm that the STATE.STATE[15:0] bits = 0x0001 (mc_state_idle).
2. Confirm that the STATUS.READY bit = 1.
3. Set the COMMAND.COMMAND[7:0] bits to 0x04 or 0x05.*
4. Set the MEMADDR.ADDRESS[31:0] bits.
5. Set the MEMSIZE.SIZE[31:0] bits.
6
Set the INITVALUE.INITVALUE[31:0] bits to 0x00000000.
7. Write 1 to the HWPCMDTRG.HWP0TRG bit.
8. Wait until the HWPINTF.HWP0IF bit is set to 1 (interrupt).
The HWP starts the memory check from this point.
9. Confirm that the STATE.STATE[15:0] bits = 0x0004 (mc_state_checksum) or 0x0005 (mc_state_crc) as
necessary.*
10. Write 0 to the HWPINTF.HWP0IF bit.
:
The memory check is in progress.
:
11. Wait until the HWPINTF.HWP0IF bit is set to 1 (interrupt).
The memory check is completed at this point.
12. Confirm that the STATE.STATE[15:0] bits = 0x0001 (mc_state_idle).
13. Write 0 to the HWPINTF.HWP0IF bit.
14. Confirm that the STATUS.PROCESSING[1:0] bits = 0x2 (check completed).
15. Read the RESULT.RESULT[31:0] bits.
These bits hold the checksum or CRC calculation result.
16. Compare the read calculation result with the original value.
* Two Flash check commands are available. Setting the COMMAND.COMMAND[7:0] bits to 0x04 selects
the Flash Checksum Start command; setting to 0x05 selects the Flash CRC Start command.
Flash Checksum Start command
When this command is issued by the trigger bit, the HWP transits to mc_state_checksum state to calculate
the checksum from the specified Flash data.
Flash CRC Start command
When this command is issued by the trigger bit, the HWP transits to mc_state_crc state to calculate the
CRC from the specified Flash data.
Note: The HWP uses memory mapped access mode (refer to the "Quad Synchronous Serial Interface"
chapter) for the external QSPI-Flash check. Therefore, external Flash memories that do not sup-
port XIP (eXecute-In-Place) cannot be checked.
22-16
Seiko Epson Corporation
(Command acceptable)
(Select command)
(Specify check start address)
(Specify check size (byte))
(Specify Flash check initial value)
(Trigger to issue command)
(Occurrence of state transition)
(Clear interrupt flag)
(Occurrence of state transition)
(Clear interrupt flag)
(Confirm check result)
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
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