Host Bus Interface Pin Mapping - Epson S1D13505F00A Technical Manual

5: HOST BUS INTERFACE PIN MAPPING

5 H B
OST US
S1D13505
SH-3 SH-4
Pin Names
AB20 A20 A20
AB[16:13] A[19:13] A[19:13]
AB[12:1] A[12:1] A[12:1]
AB0 A0 A0
DB[15:0] D[15:0] D[15:0]
WE1# WE1# WE1#
M/R#
CS#
BUSCLK CKIO CKIO
BS# BS# BS#
RD/WR# RD/WR# RD/WR#
RD# RD# RD#
WE0# WE0# WE0#
WAIT# WAIT# RDY
RESET# RESET# RESET#
4-6
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I P M
NTERFACE IN
Table 5-1 CPU Interface Pin Mapping
MC68K Bus MC68K Bus
Generic
1 2
A20 A20 A20
A[19:13] A[19:13] A[19:13]
A[12:1] A[12:1] A[12:1]
LDS# A0 A0
D[15:0] D[31:16] D[15:0]
UDS# DS# WE1#
External Decode
External Decode
CLK CLK BCLK
AS# AS# V
DD
R/W# R/W# RD1#
V SIZ1 RD0#
DD
V SIZ0 WE0#
DD
DTACK# DSACK1# WAIT#
RESET# RESET# RESET#
EPSON
S5U13505P00C REV. 1.0 ISA BUS EVALUATION BOARD
APPING
MIPS/ISA PowerPC PCMCIA
LatchA20 A11 A20
SA[19:13] A[12:18] A[19:13]
SA[12:1] A[19:30] A[12:1]
SA0 A31 A0
SD[15:0] D[0:15] D[15:0]
SBHE# BI# -CE2
CLK CLKOUT CLKI
V TS# V
DD DD
V RD/WR# -CE1
DD
MEMR# TSIZ0 -OE
MEMW# TSIZ1 -WE
IOCHRDY TA# -WAIT
inverted RESET# inverted
RESET RESET
USER'S MANUAL (X23A-G-004-04)