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SD-AT1000
15
DSP_CS
14
DSP_SCCLK
13
DSP_SCDIN
12
DSP_SCDOUT
11
DSP_RESET
10
DSP_INTREQ
9
8
OVF
7
COD_DO
6
COD_DI
5
COD_CLK
4
COD_CSN
3
DIG_FUNC+B
2
NONPCM
1
D_+5V
13
A_GND
12
A_+9V
11
LOUT3
10
ROUT3
9
LOUT2
8
ROUT2
7
LOUT1
6
ROUT1
5
LIN
4
RIN
3
DGND
2
PROTECT
1
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1
IC110
SI3050LUS
2
VOLTAGE
REGULATOR
3
PROTECT
22 21 20 19 18 17 16 15 14 13 12
23
VREFH
26
LOUT3
27
ROUT3
28
LOUT2
29
ROUT2
30
LOUT1
31
ROUT1
32
LIN
33
RIN
34
+5V(A)
+5V(D)
8
4
3
2
1
Figure 14 BLOCK DIAGRAM (3/10)
– 14 –
+5V(A)
11
SDTI1
AUDATA0
10
SDTO
SDATA1
9
BICK
SCLK
8
LRCK
LRCK
7
MCKO
IC102
MCLK
AK4586VQ
6
TX
ADC/DAC/DIR
5
TVDD
CONVERTER
4
DVSS
3
DVDD
2
XTI/EXTCLK
EX_CLK
1
XTO
36
38
40
41
42
43
Q102
RX101
OPTICAL
DIGITAL IN
2
1
T
DU
NA
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