Bus Interface Timing; Mc68000 Interface Timing; Iow# Timing; Figure 7-1 Iow# Timing (Mc68000) - Epson S1D13503 Series Technical Manual

EPSON
7 A.C. C
Conditions: V
DD
t
rise
C
L
C
L
C
L

7.1 Bus Interface Timing

MC68000 Interface Timing

Note: All input timing parameters are based on a maximum 16MHz MPU clock.

IOW# Timing

AB[9:1]
IOCS#
AS#
R/W#
UDS#/LDS#
DTACK#
DB[15:0]
Symbol
t
AB[9:1] valid before AS# falling edge
1
t
AB[9:1] hold from AS# rising edge
2
t
IOCS# hold from AS# rising edge
3
t
UDS#/LDS# valid before AS# rising edge
4
t
UDS#/LDS# falling edge to DTACK# falling edge
5
t
AS# rising edge to DTACK# hi-z delay
6
t
DB[15:0] setup to AS# rising edge
7
t
DB[15:0] hold from AS# rising edge
8
1-18
HARACTERISTICS
= 3.0V ± 10%, V = 3.3V ± 10% or V
DD
for all inputs must be ≤ 5 nsec (10% ~ 90%)
t
and
fall
= 80pF (Bus/MPU Interface)
= 100pF (LCD Panel Interface)
= 20pF (Display Memory Interface)
t
1
Hi-Z
Hi-Z

Figure 7-1 IOW# Timing (MC68000)

Table 7-1 IOW# Timing (MC68000)

Parameter
= 5.0V ± 10%, T
DD
VALID
t
4
t
5
t
7
= -40°C to 85°C
A
t
2
t
3
t
6
Hi-Z
t
8
Hi-Z
VALID
3V/3.3V 5V
Min. Max. Min. Max.
10 – 0 –
20 – 10 –
0 – 0 –
30 – 20 –
– 40 – 25
– 40 – 25
20 – 10 –
20 – 10 –
S18A-A-011-01
Units
ns
ns
ns
ns
ns
ns
ns
ns