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UPD784215AGC188 (IC581) : CPU
1. Pin layout
75
~
51
76
~
100
1
~
25
2. Pin function
Pin No.
Symbol
I/O
1~8
O
9
VDD
10
X2
11
X1
I
12
VSS
13
XT2
14
XT1
I
15, 16
I
17
INT0
I
18
INT1
I
19
I
DZF
20~22
I
23
AVDD
24
AV REF0
25
I
26
I
CS1
27
CS2
O
28
CS3
I
29
CS4
I
30~32
I
33
AVSS
34, 35
O
36
AV REF1
37
RX
O
38
TX
O
39
O
40
DSP COM
I
41
DSP STS
O
42
DSP CLK
I
43
DSP RDY
I
44
O
45
MISO
I
46
MOSI
O
47
SCK
O
48
HREQ
I
49
SS
O
50
~
26
Function
-
+3.0V
Main system clock input
Main system clock input
GND
OPEN
Connect to VSS
Error input1 (ditect UNLOCK)
Error input2 (ditect Non Audio)
GND
The same potential as VDD
The same potential as VSS
Chip select input port
Chip select input port
Chip select input port
Chip select input port
The same potential as VSS
The same potential as VDD
For flash write
For flash write
Command (serial 1)
Status (Serial 1)
Clock (Serial 1)
Ready
Data in (Serial 0)
Data out (Serial 0)
Clock (Serial 0)
HREQ
System slave select
Pin No.
Symbol
I/O
50,51
O
52
DSP_RST
O
53
O
54
DA_CS
O
55
O
56
PD_DA
O
57
PD
O
58~63
O
64
CSTI
O
65
CDTO
I
66
CCLK
O
67
C_CS
O
68
DEBUG1
O
69
DEBUG2
O
70
DEBUG3
O
71
GEBUG4
O
72
GND
73~75
O
76
EQ
O
77
CTR_TONE
O
78
3D
O
79, 80
O
81
VDD
82, 83
O
84
ANA_TT
O
85
LFE_MIX
O
86
LFE_CONT
O
87
O
88
S_MUTE
O
89~93
O
94
TEST
95~100
O
RX-8022PSL
Function
DSP RESET
Chip select output
Power down output (RESET)
Power down output (RESET)
Data out
Data in
Clock
Chip select output
Debug out port
Debug out port
Debug out port
Debug out port
GND
EQ
Center tone
3D-Phonic
+3.0V
ANALOG./T.TONE
LFE MIX CONTROL
LFE OUT CONTROL
S.MUTE
Usual "VSS"
1-29
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