Summary of Contents for National Instruments DAQ X Series
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(217) 352-9330 | Click HERE Find the National Instruments PCIe-6351 at our website:...
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DAQ X Series X Series User Manual NI 632x/634x/635x/636x Devices X Series User Manual Français Deutsch ni.com/manuals February 2012 370784D-01 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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Instruments Corporation. National Instruments respects the intellectual property of others, and we ask our users to do the same. NI software is protected by copyright and other intellectual property laws. Where NI software may be used to reproduce software or other materials belonging to others, you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction.
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NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION, INCLUDING, WITHOUT LIMITATION, THE APPROPRIATE DESIGN, PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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Furthermore, any changes or modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules.
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Contents Signal Conditioning....................... 2-8 Sensors and Transducers ................. 2-8 Signal Conditioning Options................2-9 SCXI ....................2-9 SCC....................2-9 Programming Devices in Software................2-10 Chapter 3 Connector and LED Information I/O Connector Signal Descriptions................3-1 +5 V Power Source......................3-3 PCI Express Device Disk Drive Power Connector ............3-4 When to Use the Disk Drive Power Connector ..........
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Contents Chapter 5 Analog Output AO Reference Selection ....................5-2 Minimizing Glitches on the Output Signal..............5-3 Analog Output Data Generation Methods..............5-3 Software-Timed Generations ................5-3 Hardware-Timed Generations................. 5-3 Analog Output Triggering ..................... 5-5 Connecting Analog Output Signals ................5-5 Analog Output Timing Signals..................
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Contents Glossary Index Device Pinouts Figure A-1. NI PCIe-6320 Pinout................A-3 Figure A-2. NI PCIe-6321 and NI PCIe/PXIe-6341 Pinout ........A-6 Figure A-3. NI USB-6341 Pinout................A-7 Figure A-4. NI PCIe-6323/6343 Pinout ..............A-8 Figure A-5. NI USB-6343 Pinout................A-10 Figure A-6.
The NI-DAQ Readme lists which devices, ADEs, and NI application software are supported by this version of NI-DAQ. Select Start» All Programs»National Instruments»NI-DAQ»NI-DAQ Readme. The NI-DAQmx Help contains general information about measurement concepts, key NI-DAQmx concepts, and common applications that are applicable to all programming environments.
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Select Start»All Programs»National Instruments»NI-DAQ»NI-DAQmx Help. The NI-DAQmx C Reference Help describes the NI-DAQmx Library functions, which you can use with National Instruments data acquisition devices to develop instrumentation, acquisition, and control applications. Select Start»All Programs»National Instruments»NI-DAQ» Text-Based Code Support»NI-DAQmx C Reference Help.
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Adobe Acrobat Reader with Search and Accessibility 5.0.5 or later installed to view the PDFs. Refer to the Adobe Systems Incorporated Web site at to download Acrobat Reader. Refer to the www.adobe.com National Instruments Product Manuals Library at ni.com/manuals updated documentation resources. X Series User Manual xxii ni.com...
Chapter 1 Getting Started Remove the device from the package and inspect it for loose components or any other signs of damage. Notify NI if the device appears damaged in any way. Do not install a damaged device in your computer or chassis. Store the device in the antistatic package when the device is not in use.
Chapter 1 Getting Started Ferrite Installation To ensure the specified EMC (NI USB-636 Mass Termination Devices) performance for radiated RF emissions of the NI USB-636x Mass Termination device, install the included snap-on ferrite bead onto the power cable, as shown in Figure 1-2. Ensure that the ferrite bead is as close to the end of the power cable as practical.
Chapter 1 Getting Started DIN Rail Mounting Complete the following steps to mount your USB X Series device to a DIN rail using the USB X Series mounting kit with DIN rail clip (part number 781515-01 not included in your X Series USB device kit). Fasten the DIN rail clip to the back of the backpanel wall mount using a #1 Phillips screwdriver and four machine screws (part number 740981-01), included in the kit as shown in Figure 1-4.
Chapter 1 Getting Started USB Device Security Cable Slot The security cable slot, shown in (NI USB-634x/635x/636x Devices) Figure 1-6, allows you to attach an optional laptop lock to your X Series USB device. The security cable is designed to act as a deterrent, but might not prevent the device Note from being mishandled or stolen.
Chapter 2 DAQ System Overview Analog Input Analog Output Digital Routing Digital I/O and Clock Interface Generation Counters RTSI Figure 2-2. General X Series Block Diagram DAQ-STC3 The DAQ-STC3 and DAQ-6202 implement a high-performance digital engine for X Series data acquisition hardware. Some key features of this engine include the following: •...
Chapter 2 DAQ System Overview NI offers a variety of products to use with X Series PCI Express, PXI Express, and USB Mass Termination devices, including cables, connector blocks, and other accessories, as follows: • Shielded cables and cable assemblies, and unshielded ribbon cables and cable assemblies •...
Chapter 2 DAQ System Overview Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks. Use an SHC68-68-EPM shielded cable to connect an X Series device to a connector block, such as the following: • CB-68LP and CB-68LPR—Unshielded connector blocks •...
Chapter 2 DAQ System Overview USB Screw Terminal Device Accessories NI offers a variety of products to use with USB Screw Terminal X Series devices, as follows: • USB X Series mounting kit—Part number 781514-01 • USB X Series mounting kit with DIN rail clip—Part number 781515-01 •...
X Series Simultaneous MIO (SMIO) devices do not support SCC. Programming Devices in Software National Instruments measurement devices are packaged with NI-DAQmx driver software, an extensive library of functions and VIs you can call from your application software, such as LabVIEW or LabWindows/CVI, to program all the features of your NI measurement devices.
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Chapter 3 Connector and LED Information Table 3-1. I/O Connector Signals Signal Name Reference Direction Description AI GND — — Analog Input Ground—These terminals are the reference point for single-ended AI measurements in RSE mode and the bias current return point for DIFF measurements. All three ground references—AI GND, AO GND, and D GND—are connected on the device.
Chapter 3 Connector and LED Information Note (PCI Express X Series Devices) PCI Express X Series devices supply less than 1 A of +5 V power unless you use the disk drive power connector. Refer to the PCI Express Device Disk Drive Power Connector section for more information. PCI Express Device Disk Drive Power Connector (NI PCIe-632x/634x/635x/636x Devices) The disk drive power connector is a...
Chapter 4 Analog Input • Mux—Each MIO X Series device has one analog-to-digital converter (ADC). The multiplexers (mux) route one AI channel at a time to the ADC through the NI-PGIA. • Ground-Reference Settings—The analog input ground-reference settings circuitry selects between differential, referenced single-ended, and non-referenced single-ended input modes.
Chapter 4 Analog Input Working Voltage Range On most MIO X Series devices, the PGIA operates normally by amplifying signals of interest while rejecting common-mode signals under the following three conditions: • The common-mode voltage (V ), which is equivalent to subtracting AI <0..x>...
Chapter 4 Analog Input AI ground-reference setting is sometimes referred to as AI terminal configuration. Configuring AI Ground-Reference Settings in Software You can program channels on an MIO X Series device to acquire with different ground references. To enable multimode scanning in LabVIEW, use NI-DAQmx Create of the NI-DAQmx API.
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The capacitance of the cable also can increase the settling time. National Instruments recommends using individually shielded, twisted-pair wires that are 2 m or less to connect AI signals to the device. Refer to the...
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Chapter 4 Analog Input Suppose a 4 V signal is connected to channel 0 and a 1 mV signal is connected to channel 1. The input range for channel 0 is –10 V to 10 V and the input range of channel 1 is –200 mV to 200 mV. When the multiplexer switches from channel 0 to channel 1, the input to the NI-PGIA switches from 4 V to 1 mV.
Chapter 4 Analog Input Software-Timed Acquisitions With a software-timed acquisition, software controls the rate of the acquisition. Software sends a separate command to the hardware to initiate each ADC conversion. In NI-DAQmx, software-timed acquisitions are referred to as having on-demand timing. Software-timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data.
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Chapter 4 Analog Input Table 4-3. MIO X Series Analog Input Configuration Floating Signal Sources (Not Connected to Building Ground-Referenced † Ground) Signal Sources Examples: Example: • Ungrounded thermocouples • Plug-in instruments with non-isolated outputs • Signal conditioning with isolated outputs AI Ground-Reference Setting •...
Chapter 4 Analog Input In the single-ended modes, more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations. The coupling is the result of differences in the signal path. Magnetic coupling is proportional to the area between the two signal conductors. Electrical coupling is a function of how much the electric field differs between the two conductors.
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Chapter 4 Analog Input MIO X Series Device Floating Signal Source – AI– R is about AI SENSE 100 times source AI GND impedance of sensor Figure 4-5. Differential Connections for Floating Signal Sources with Single Bias Resistor You can fully balance the signal path by connecting another resistor of the same value between the positive input and AI GND, as shown in Figure 4-6.
Chapter 4 Analog Input MIO X Series Device AC Coupling AC Coupled Floating Signal – Source AI– AI SENSE AI GND Figure 4-7. Differential Connections for AC Coupled Floating Sources with Balanced Bias Resistors Using Non-Referenced Single-Ended (NRSE) Connections for Floating Signal Sources It is important to connect the negative lead of a floating signals source to AI GND (either directly or through a resistor).
Chapter 4 Analog Input Connecting Ground-Referenced Signal Sources What Are Ground-Referenced Signal Sources? A ground-referenced signal source is a signal source connected to the building system ground. It is already connected to a common ground point with respect to the device, assuming that the computer is plugged into the same power system as the source.
Chapter 4 Analog Input Using Differential Connections for Ground-Referenced Signal Sources Figure 4-10 shows how to connect a ground-referenced signal source to the MIO X Series device configured in differential mode. AI + Ground- Referenced Instrumentation Signal Amplifier – Source PGIA AI –...
Chapter 4 Analog Input Using the DAQ Assistant, you can configure the channels for RSE or NRSE input modes. Refer to the Configuring AI Ground-Reference Settings in Software section for more information about the DAQ Assistant. Field Wiring Considerations Environmental noise can seriously affect the measurement accuracy of the device if you do not take proper care when running signal wires between signal sources and the device.
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Chapter 4 Analog Input Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is received. A typical posttriggered DAQ sequence is shown in Figure 4-14. The sample counter is loaded with the specified number of posttrigger samples, in this example, five.
Chapter 4 Analog Input Table 4-4. Analog Input Rates for MIO X Series Devices (Continued) Analog Input Rate Multi-Channel MIO X Series Device Single Channel (Aggregate) NI 6351/6353 1.25 MS/s 1 MS/s NI 6361/6363 2 MS/s 1 MS/s On NI 6351/6353/6361/6363 devices, the single channel rate is higher than the aggregate rate because while the ADC can sample at that rate, the PGIA cannot settle fast enough to meet accuracy specifications.
Chapter 4 Analog Input Figure 4-16 shows the relationship of AI Sample Clock to AI Start Trigger. AI Sample Clock Timebase AI Start Trigger AI Sample Clock Delay From Start Trigger Figure 4-16. AI Sample Clock and AI Start Trigger AI Sample Clock Timebase Signal You can route any of the following signals to be the AI Sample Clock Timebase (ai/SampleClockTimebase) signal:...
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Chapter 4 Analog Input Using an External Source Use one of the following external signals as the source of AI Convert Clock: • PFI <0..15> • RTSI <0..7> • PXI_STAR • PXIe-DSTAR<A,B> • Analog Comparison Event (an analog trigger) Routing AI Convert Clock Signal to an Output Terminal You can route AI Convert Clock (as an active low signal) out to any PFI <0..15>, RTSI <0..7>, or PXIe-DSTARC terminal.
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Chapter 4 Analog Input Using a Digital Source To use AI Start Trigger with a digital source, specify a source and an edge. The source can be any of the following signals: • PFI <0..15> • RTSI <0..7> • Counter n Internal Output •...
Chapter 4 Analog Input Using a Digital Source To use AI Reference Trigger with a digital source, specify a source and an edge. The source can be any of the following signals: • PFI <0..15> • RTSI <0..7> • PXI_STAR •...
Chapter 4 Analog Input Using an Analog Source When you use an analog trigger source, the internal sample clock pauses when the Analog Comparison Event signal is low and resumes when the signal goes high (or vice versa). Routing AI Pause Trigger Signal to an Output Terminal You can route AI Pause Trigger out to any PFI <0..15>, RTSI <0..7>, PXI_STAR, or PXIe-DSTARC terminal.
Chapter 4 Analog Input • AI FIFO—Simultaneous MIO X Series devices can perform both single and multiple A/D conversions of a fixed or infinite number of samples. A large first-in-first-out (FIFO) buffer holds data during A/D conversions to ensure that no data is lost. Simultaneous MIO X Series devices can handle multiple A/D conversion operations with DMA or programmed I/O.
Chapter 4 Analog Input Analog Input Data Acquisition Methods When performing analog input measurements, you either can perform software-timed or hardware-timed acquisitions. • Software-timed acquisitions—With a software-timed acquisition, software controls the rate of the acquisition. Software sends a separate command to the hardware to initiate each ADC conversion. In NI-DAQmx, software-timed acquisitions are referred to as having on-demand timing.
Chapter 4 Analog Input Analog Input Triggering Analog input supports three different triggering actions: • Start trigger • Reference trigger • Pause trigger Refer to the AI Start Trigger Signal, AI Reference Trigger Signal, and AI Pause Trigger Signal sections for information about these triggers. An analog or digital trigger can initiate these actions.
Chapter 4 Analog Input Differential Connections for Ground-Referenced Signal Sources Figure 4-26 shows how to connect a ground-referenced signal source to a channel on an Simultaneous MIO X Series device. Simultaneous X Series Device Instrumentation AI 0 + Amplifier Ground- Referenced Signal –...
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Chapter 4 Analog Input DC-Coupled You can connect low source impedance and high source impedance DC-coupled sources: • Low Source Impedance—You must reference the source to AI GND. The easiest way to make this reference is to connect the positive side of the signal to the positive input of the instrumentation amplifier and connect the negative side of the signal to AI GND as well as to the negative input of the instrumentation amplifier, without using resistors.
Chapter 4 Analog Input common-mode rejection ratio (CMRR). These methods are outlined in the Connecting Analog Input Signals section. AI GND is an AI common signal that routes directly to the ground connection point on the devices. You can use this signal if you need a general analog ground connection point to the device.
Chapter 4 Analog Input The total aggregate determines the maximum bus bandwidth used by the device. The total aggregate sample rate is the product of the maximum sample rate for a single channel multiplied by the number of AI channels that the device support.
Chapter 4 Analog Input Figure 4-30 shows the relationship of AI Sample Clock to AI Start Trigger. AI Sample Clock Timebase AI Start Trigger AI Sample Clock Delay From Start Trigger Figure 4-30. AI Sample Clock and AI Start Trigger AI Sample Clock Timebase Signal You can route any of the following signals to be the AI Sample Clock Timebase (ai/SampleClockTimebase) signal:...
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Chapter 4 Analog Input Note Waveform information from LabVIEW will not reflect the delay between triggers. They will be treated as a continuous acquisition with constant t0 and dt information. Some X Series devices internally transfer data in sample Note (NI USB-6356/6366 Devices) pairs, as opposed to single samples.
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Chapter 4 Analog Input When the reference trigger occurs, the DAQ device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired. Figure 4-32 shows the final buffer. Reference Trigger Pretrigger Samples Posttrigger Samples Complete Buffer Figure 4-32.
Chapter 4 Analog Input • Counter n Gate • AO Pause Trigger (ao/PauseTrigger) • DI Pause Trigger (di/PauseTrigger) • DO Pause Trigger (do/PauseTrigger) The source also can be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
Chapter 5 Analog Output • AO Sample Clock—The AO Sample Clock signal reads a sample from the DAC FIFO and generates the AO voltage. • AO Reference Selection—The AO reference selection signal allows you to change the range of the analog outputs. AO Reference Selection AO reference selection allows you to set the analog output range.
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Chapter 5 Analog Output operations are optimized for low latency and low jitter. In addition, HWTSP can notify software if it falls behind hardware. These features make HWTSP ideal for real time control applications. HWTSP operations, in conjunction with the wait for next sample clock function, provide tight synchronization between the software layer and the hardware layer.
Chapter 5 Analog Output Analog Output Channels Analog Output Channels AO 0 AO 2 Channel 0 Channel 2 V OUT V OUT Load Load – – AO GND AO GND Load V OUT Load V OUT AO 1 AO 3 Channel 1 Channel 3 X Series Device...
Chapter 5 Analog Output • PXI_STAR • PXIe-DSTAR<A,B> • Counter n Internal Output • Change Detection Event • DI Start Trigger (di/StartTrigger) • DI Reference Trigger (di/ReferenceTrigger) • DO Start Trigger (do/StartTrigger) The source also can be one of several internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
Chapter 5 Analog Output • DI Pause Trigger (di/PauseTrigger) • DO Pause Trigger (do/PauseTrigger) The source also can be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information.
Chapter 5 Analog Output Figure 5-7 shows the relationship of AO Sample Clock to AO Start Trigger. AO Sample Clock Timebase AO Start Trigger AO Sample Clock Delay From Start Trigger Figure 5-7. AO Sample Clock and AO Start Trigger AO Sample Clock Timebase Signal The AO Sample Clock Timebase (ao/SampleClockTimebase) signal is divided down to provide a source for AO Sample Clock.
Chapter 6 Digital I/O DO Waveform Generation FIFO DO Sample Clock Static DO Buffer P0.x I/O Protection DO.x Direction Control Weak Pull-Down Static DI DI Waveform Filter Measurement FIFO DI Sample Clock DI Change Detection Figure 6-1. X Series Digital I/O Circuitry The DIO terminals are named P0.<0..31>...
Chapter 6 Digital I/O an error in this case. With continuous operations, if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer, the buffer could reach an overflow condition, causing an error to be generated.
Chapter 6 Digital I/O DI Sample Clock Signal The device uses the DI Sample Clock (di/SampleClock) signal to sample the Port 0 terminals and store the result in the DI waveform acquisition FIFO. You can specify an internal or external source for DI Sample Clock. You also can specify whether the measurement sample begins on the rising edge or falling edge of DI Sample Clock.
Chapter 6 Digital I/O • PXI_CLK10 • RTSI <0..7> • PFI <0..15> • PXI_STAR • PXIe-DSTAR<A,B> • Analog Comparison Event (an analog trigger) Refer to the Routing Table in MAX for all additional routable signals. DI Sample Clock Timebase is not available as an output on the I/O connector.
Chapter 6 Digital I/O Using an Analog Source When you use an analog trigger source, the acquisition begins on the first rising or falling edge of the Analog Comparison Event signal. Routing DI Start Trigger to an Output Terminal You can route DI Start Trigger out to any PFI <0..15>, RTSI <0..7>, or PXIe-DSTARC terminal.
Chapter 6 Digital I/O Using an Analog Source When you use an analog trigger source, the acquisition stops on the first rising edge of the Analog Comparison Event signal. Routing DI Reference Trigger Signal to an Output Terminal You can route DI Reference Trigger out to any PFI <0..15>, RTSI <0..7>, PXI_Trig <0..7>, or PXIe-DSTARC terminal.
Chapter 6 Digital I/O Digital Output Data Generation Methods When performing a digital waveform operation, you either can perform software-timed or hardware-timed generations. Software-Timed Generations With a software-timed generation, software controls the rate at which data is generated. Software sends a separate command to the hardware to initiate each update.
Chapter 6 Digital I/O Digital Output Triggering Digital output supports two different triggering actions: • Start trigger • Pause trigger An analog or digital trigger can initiate these actions. All X Series devices support digital triggering, but some do not support analog triggering. To find your device’s triggering options, refer to the specifications document for your device.
Chapter 6 Digital I/O Routing DO Sample Clock to an Output Terminal You can route DO Sample Clock (as an active low signal) out to any PFI <0..15>, RTSI <0..7>, or PXIe-DSTARC terminal. Other Timing Requirements The DO timing engine on your device internally generates DO Sample Clock unless you select some external source.
Chapter 6 Digital I/O Using a Digital Source To use DO Start Trigger, specify a source and an edge. The source can be one of the following signals: • A pulse initiated by host software • PFI <0..15> • RTSI <0..7> •...
Chapter 6 Digital I/O Using a Digital Source To use DO Pause Trigger, specify a source and a polarity. The source can be one of the following signals: • PFI <0..15> • RTSI <0..7> • PXI_STAR • PXIe-DSTAR<A,B> • Counter n Internal Output •...
Chapter 6 Digital I/O DI Change Detection You can configure the DAQ device to detect changes on all 32 digital input lines (P0, P1, and P2) and all 16 PFI lines. Figure 6-11 shows a block diagram of the DIO change detection circuitry. Enable P0.0 Synch...
Chapter 6 Digital I/O Figure 6-15 illustrates the difference between line and bus filtering. Digital Input P0.A Digital Input P0.B Filter Clock Filtered Input A Filtered Input B 2A With line filtering, filtered input A would ignore the glitch on digital input P0.B and transition after two filter clocks. 3A Filtered input A goes high when sampled high for two consecutive filter clocks and transitions on the next filter edge because digital input P0.B glitches.
Chapter 6 Digital I/O Getting Started with DIO Applications in Software You can use the X Series device in the following digital I/O applications: • Static digital input • Static digital output • Digital waveform generation • Digital waveform acquisition •...
Chapter 7 Counters generations. The embedded counters cannot be programmed independent of the main counter; signals from the embedded counters are not routable. Counter Timing Engine Unlike analog input, analog output, digital input, and digital output, X Series counters do not have the ability to divide down a timebase to produce an internal counter sample clock.
Chapter 7 Counters Refer to the following sections for more information about X Series edge counting options: • Single Point (On-Demand) Edge Counting • Buffered (Sample Clock) Edge Counting Single Point (On-Demand) Edge Counting With single point (on-demand) edge counting, the counter counts the number of edges on the Source input after the counter is armed.
Chapter 7 Counters Pulse-Width Measurement In pulse-width measurements, the counter measures the width of a pulse on its Gate input signal. You can configure the counter to measure the width of high pulses or low pulses on the Gate signal. You can route an internal or external periodic clock signal (with a known period) to the Source input of the counter.
Chapter 7 Counters Sample Clocked Buffered Pulse-Width Measurement A Sample Clocked Buffered pulse-width measurement is similar to single pulse-width measurement, but buffered pulse-width measurement takes measurements over multiple pulses correlated to a sample clock. The counter counts the number of edges on the Source input while the Gate input remains active.
Chapter 7 Counters Implicit Buffered Pulse Measurement In an implicit buffered pulse measurement, on each edge of the Gate signal, the counter stores the count in the FIFO. A DMA controller transfers the stored values to host memory. The counter begins counting when it is armed. The arm usually occurs between edges on the Gate input but the counting does not start until the desired edge.
Chapter 7 Counters Also, pulse measurements support sample clock timing while semi-period measurements do not. Semi-Period Measurement In semi-period measurements, the counter measures a semi-period on its Gate input signal after the counter is armed. A semi-period is the time between any two consecutive edges on the Gate input.
Chapter 7 Counters You can configure the counter to measure one period of the gate signal. The frequency of fx is the inverse of the period. Figure 7-12 illustrates this method. Interval Measured Gate … … Source Single Period Period of fx = Measurement Frequency of fx = Figure 7-12.
Chapter 7 Counters Signal to Source Measure (fx) Counter 0 Signal of Known Source Frequency (fk) Counter 1 Gate 3 … N CTR_0_SOURCE (Signal to Measure) CTR_0_OUT Interval (CTR_1_GATE) to Measure CTR_1_SOURCE Figure 7-14. Large Range of Frequencies with Two Counters NI-DAQmx then routes the Counter 0 Internal Output signal to the gate of Counter 1.
Chapter 7 Counters Hardware-Timed Single Point Frequency Measurement hardware-timed single point (HWTSP) frequency measurements can either be a single frequency measurement or an average between sample clocks. Use CI.Freq.EnableAveraging to set the behavior. For hardware-timed single point, the default is False. Refer to the Sample Clocked Buffered Frequency Measurement section for more information.
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Chapter 7 Counters Which Method Is Best? This depends on the frequency to be measured, the rate at which you want to monitor the frequency and the accuracy you desire. Take for example, measuring a 50 kHz signal. Assuming that the measurement times for the sample clocked (with averaging) and two counter frequency measurements are configured the same, Table 7-3 summarizes the results.
Chapter 7 Counters clocked frequency measurement is not dependent on the measured frequency so at 50 kHz and 5 MHz with a measurement time of 1 ms the error % will still be 0.001%. One of the disadvantages of a sample clocked frequency measurement is that the frequency to be measured must be at least twice the sample clock rate to ensure that a full period of the frequency to be measured occurs between sample clocks.
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Chapter 7 Counters • X2 Encoding—The same behavior holds for X2 encoding except the counter increments or decrements on each edge of channel A, depending on which channel leads the other. Each cycle results in two increments or decrements, as shown in Figure 7-19. Ch A Ch B Counter Value 5...
Chapter 7 Counters counter armed event; that is, the sample clock does not reset the counter. You can route the counter sample clock to the Gate input of the counter. You can configure the counter to sample on the rising or falling edge of the sample clock.
Chapter 7 Counters Implicit Buffered Two-Signal Edge-Separation Measurement Implicit buffered and single two-signal edge-separation measurements are similar, but implicit buffered measurement measures multiple intervals. The counter counts the number of rising (or falling) edges on the Source input occurring between an active edge of the Gate signal and an active edge of the Aux signal.
Chapter 7 Counters Counter Output Applications The following sections list the various counter output applications available on X Series devices: • Simple Pulse Generation • Pulse Train Generation • Frequency Generation • Frequency Division • Pulse Generation for ETS Simple Pulse Generation Refer to the following sections for more information about the X Series simple pulse generation options: •...
Chapter 7 Counters Finite Pulse Train Generation This function generates a train of pulses with programmable frequency and duty cycle for a predetermined number of pulses. With X Series counters, the primary counter generates the specified pulse train and the embedded counter counts the pulses generated by the primary counter.
Chapter 7 Counters With non-regeneration, old data will not be repeated. New data must be continually written to the buffer. If the program does not write new data to the buffer at a fast enough rate to keep up with the generation, the buffer will underflow and cause an error.
Chapter 7 Counters Pulse Generation for ETS In the equivalent time sampling (ETS) application, the counter produces a pulse on the output a specified delay after an active edge on Gate. After each active edge on Gate, the counter cumulatively increments the delay between the Gate and the pulse on the output by a specified amount.
Chapter 7 Counters Routing a Signal to Counter n Aux Each counter has independent input selectors for the Counter n Aux signal. Any of the following signals can be routed to the Counter n Aux input: • RTSI <0..7> • PFI <0..15>...
Chapter 7 Counters If the DAQ device receives a Counter n Sample Clock when the FIFO is full, it reports an overflow error to the host software. Using an Internal Source To use Counter n Sample Clock with an internal source, specify the signal source and the polarity of the signal.
Chapter 7 Counters You can use these defaults or select other sources and destinations for the counter/timer signals in NI-DAQmx. Refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help for more information about how to connect your signals for common counter measurements and generations.
Chapter 7 Counters Synchronization Modes The 32-bit counter counts up or down synchronously with the Source signal. The Gate signal and other counter inputs are asynchronous to the Source signal, so X Series devices synchronize these signals before presenting them to the internal counter. Depending on how you configure your device, X Series devices use one of three synchronization methods: •...
Chapter 8 When a terminal is used as a timing input or output signal, it is called PFI x (where x is an integer from 0 to 15). When a terminal is used as a static digital input or output, it is called P1.x or P2.x. On the I/O connector, each terminal is labeled PFI x/P1.x or PFI x/P2.x.
Chapter 8 Using PFI Terminals as Static Digital I/Os Each PFI can be individually configured as a static digital input or a static digital output. When a terminal is used as a static digital input or output, it is called P1.x or P2.x. On the I/O connector, each terminal is labeled PFI x/P1.x or PFI x/P2.x.
Chapter 9 Digital Routing and Clock Generation 100 MHz Timebase The 100 MHz Timebase can be used as the timebase for all internal subsystems. The 100 MHz Timebase is generated from the following sources: • Onboard oscillator • External signal (by using the external reference clock) 20 MHz Timebase The 20 MHz Timebase can be used to generate many of the AI and AO timing signals.The 20 MHz Timebase also can be used as the Source input...
• Share trigger signals between devices Many National Instruments DAQ, motion, vision, and CAN devices support RTSI. In a PCI Express system, the RTSI bus consists of the RTSI bus interface and a ribbon cable. The bus can route timing and trigger signals between several functions on as many as five DAQ, vision, motion, or CAN devices in the computer.
Chapter 9 Digital Routing and Clock Generation Table 9-1. RTSI Signals (Continued) RTSI Bus Signal Terminal RTSI 2 RTSI 1 RTSI 0 Not Connected. Do not connect 1–18 signals to these terminals. D GND 19, 21, 23, 25, 27, 29, 31, 33 Using RTSI as Outputs RTSI <0..7>...
Chapter 9 Digital Routing and Clock Generation PXI and PXI Express Clock and Trigger Signals PXI and PXI Express clock and trigger signals are only available on PXI Express devices. PXIe_CLK100 PXIe_CLK100 is a common low-skew 100 MHz reference clock for synchronization of multiple modules in a PXI Express measurement or control system.
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Chapter 9 Digital Routing and Clock Generation Table 9-2 describes the three differential star (DSTAR) lines and how they are used. Table 9-2. PXIe-DSTAR Line Descriptions Trigger Line Purpose PXIe_DSTARA Distributes high-speed, high-quality clock signals from the system timing slot to the peripherals (input).
Chapter 10 Bus Interface – Digital waveform generation (digital output) – Digital waveform acquisition (digital input) Each DMA controller channel contains a FIFO and independent processes for filling and emptying the FIFO. This allows the buses involved in the transfer to operate independently for maximum performance.
Chapter 11 Triggering You also can program your DAQ device to perform an action in response to a trigger from a digital source. The action can affect the following: • Analog input acquisition • Analog output generation • Counter behavior •...
Chapter 11 Triggering Analog Input Channels on MIO X Series Devices Select any analog input channel to drive the NI-PGIA. The NI-PGIA amplifies the signal as determined by the input ground-reference setting and the input range. The output of the NI-PGIA then drives the analog trigger detection circuit.
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Chapter 11 Triggering Analog Edge Triggering with Hysteresis—Hysteresis adds a programmable voltage region above or below the trigger level that an input signal must pass through before the DAQ device recognizes a trigger condition, and is often used to reduce false triggering due to noise or jitter in the signal.
Chapter 11 Triggering Analog Trigger Accuracy The analog trigger circuitry compares the voltage of the trigger source to the output of programmable trigger DACs. When you configure the level (or the high and low limits in window trigger mode), the device adjusts the output of the trigger DACs.
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Appendix A Device-Specific Information NI 6320 The following sections contain information about the NI PCIe-6320 device. NI 6320 Pinout Figure A-1 shows the pinout of the NI PCIe-6320 device. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information.
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Appendix A Device-Specific Information NI 6320 Specifications Refer to the NI 632x Specifications for more detailed information about the NI 6320 device. NI 6320 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories section of Chapter 2,...
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Appendix A Device-Specific Information 68 34 AI 0 (AI 0+) AI 8 (AI 0–) 67 33 AI GND AI 1 (AI 1+) 66 32 AI 9 (AI 1–) AI GND 65 31 AI 2 (AI 2+) AI 10 (AI 2–) 64 30 AI GND AI 3 (AI 3+)
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Appendix A Device-Specific Information NI 6323/6343 The following sections contain information about the NI PCIe-6323, NI PCIe-6343, and NI USB-6343 devices. NI 6323/6343 Pinout Figure A-4 shows the pinout of the NI PCIe-6323/6343. The I/O signals appear on two 68-pin connectors. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3,...
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Appendix A Device-Specific Information Figure A-5 shows the pinout of the NI USB-6343. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. AI 4 (AI 4+) AI 20 (AI 20+) AI 0 (AI 0+) AI 16 (AI 16+) AI 12 (AI 4–)
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Appendix A Device-Specific Information NI 6351/6361 The following sections contain information about the NI PCIe 6351, NI USB-6351 Screw Terminal, NI PCIe/PXIe-6361, and NI USB-6361 (Screw Terminal and Mass Termination) devices. NI 6351/6361 Pinout Figure A-6 shows the pinout of the NI PCIe-6351 and NI PCIe/PXIe-6361. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions...
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Appendix A Device-Specific Information Figure A-8 shows the pinout of the NI USB-6361 Mass Termination. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. 68 34 AI 0 (AI 0+) AI 8 (AI 0–) 67 33 AI GND...
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Appendix A Device-Specific Information NI 6353/6363 The following sections contain information about the NI PCIe-6353, NI USB-6353 Screw Terminal, NI PCIe/PXIe-6363, NI USB-6363 Mass Termination, and NI USB-6363 Screw Terminal devices. NI 6353/6363 Pinout Figure A-9 shows the pinout of the NI PCIe-6353 and NI PCIe/PXIe-6363. The I/O signals appear on two 68-pin connectors.
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Appendix A Device-Specific Information Figure A-10 shows the pinout of the NI USB-6363 Mass Termination. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. AI 24 (AI 16–) AI 0 (AI 0+) 68 34 AI 8 (AI 0–)
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Appendix A Device-Specific Information Figure A-11 shows the pinout of the NI USB-6353/6363 Screw Terminal. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. AI 4 (AI 4+) AI 20 (AI 20+) AI 0 (AI 0+) AI 16 (AI 16+)
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Appendix A Device-Specific Information NI 6356/6366 The following sections contain information about the NI PXIe-6356, NI USB-6356 Screw Terminal, NI PXIe-6366, NI USB-6366 Mass Termination, and NI USB-6366 Screw Terminal devices. NI 6356/6366 Pinout Figure A-12 shows the pinout of the NI PXIe-6356/6366. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3,...
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Appendix A Device-Specific Information Figure A-13 shows the pinout of the NI USB-6366 Mass Termination. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. 68 34 AI 0+ AI 0–...
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Appendix A Device-Specific Information NI 6356/6366 Specifications Refer to the NI 6356/6358 Specifications for more detailed information about the NI 6356 device. Refer to the NI 6366/6368 Specifications for more detailed information about the NI 6366 device. NI 6356/6366 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device.
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Appendix A Device-Specific Information Note Refer to Table 7-9, X Series PCI Express/PXI Express/USB Mass Termination Device Default NI-DAQmx Counter/Timer Pins, for a list of the default NI-DAQmx counter/timer pins for this device. For more information about default NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help.
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Appendix B Troubleshooting common-mode rejection ratio (CMRR). These methods are outlined in the Connecting Analog Input Signals section of Chapter 4, Analog Input. AI GND is an AI common signal that routes directly to the ground connection point on the devices. You can use this signal if you need a general analog ground connection point to the device.
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Technical Support and Professional Services Log in to your National Instruments User Profile to get ni.com personalized access to your services. Visit the following sections of for technical support and professional services: ni.com • Support—Technical support at includes the ni.com/support following resources: –...
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Appendix C Technical Support and Professional Services • System Integration—If you have time constraints, limited in-house technical resources, or other project challenges, National Instruments Alliance Partner members can help. To learn more, call your local NI office or visit ni.com/alliance •...
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Glossary Amperes—the unit of electric current. Analog-to-Digital. Most often used as A/D converter. Alternating current. accuracy A measure of the capability of an instrument or sensor to faithfully indicate the value of the measured signal. This term is not related to resolution; however, the accuracy level can never be better than the resolution of the instrument.
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Glossary channel Pin or wire lead to which you apply or from which you read the analog or digital signal. Analog signals can be single-ended or differential. For digital signals, you group channels to form ports. Ports usually consist of either four or eight digital channels.
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Glossary Direct current—although the term speaks of current, many different types of DC measurements are made, including DC Voltage, DC current, and DC power. device An electronic board that performs general analog or digital I/O functions on one or multiple channels, connected to a PC through a bus or I/O port, such as PCI, PXI, Ethernet, USB, or serial.
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Glossary frequency The number of alternating signals that occur per unit time. Feet. function 1. A built-in execution element, comparable to an operator, function, or statement in a conventional language. 2. A set of software instructions executed by a single line of code that may have input and/or output parameters and returns a value when executed.
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Glossary Megahertz—A unit of frequency; 1 MHz = 10 Hz = 1,000,000 Hz. Multifunction I/O—DAQ module. Designates a family of data acquisition products that have multiple analog input channels, digital I/O channels, timing, and optionally, analog output channels. An MIO product can be considered a miniature mixed signal tester, due to its broad range of signal types and flexibility.
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Glossary Programmable Function Interface. PGIA Programmable Gain Instrumentation Amplifier. physical channel See channel. Plug and Play devices A specification prepared by Microsoft, Intel, and other PC-related companies that result in PCs with plug-in devices that can be fully configured in software, without jumpers or switches on the devices. posttriggering The technique used on a DAQ device to acquire a programmed number of samples after trigger conditions are met.
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Also called a grounded measurement system. RTSI bus Real-Time System Integration bus—The National Instruments timing bus that connects DAQ devices directly, by means of connectors on top of the devices, for precise synchronization of functions.
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Glossary signal conditioning 1. Electronic equipment that makes transducer or other signals suitable in level and range to be transmitted over a distance, or to interface with voltage input instruments. 2. The manipulation of signals to prepare them for digitizing. signal source A generic term for any instrument in the family of signal generators.
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Glossary Universal Serial Bus—A 480 Mbit/s serial bus with up to 12-Mbps bandwidth for connecting computers to keyboards, printers, and other peripheral devices. USB 2.0 retains compatibility with the original USB specification. Common-mode voltage. Ground loop voltage. Volts, input high. Volts, input low.
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Index AI Start Trigger signal MIO X Series devices, 4-1 MIO X Series devices, 4-35 AI Convert Clock, 4-31 Simultaneous MIO X Series devices, 4-57 AI Convert Clock Timebase, 4-34 ai/ConvertClock, 4-31 AI Hold Complete Event, 4-34 AI Pause Trigger, 4-38 ai/ConvertClockTimebase, 4-34 ai/HoldCompleteEvent AI Reference Trigger, 4-37...
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Index NI 6356/6366, A-26 signal rejection considerations NI 6358/6368, A-28 differential ground-referenced signals (Simultaneous MIO X X Series devices, 2-4 Series devices), 4-48 calibration, 1-2 configuring AI ground-reference settings in circuitry, 2-3 software calibration certificate (NI resources), C-2 MIO X Series devices, 4-6 cascading counters, 7-51 Simultaneous MIO X Series devices, 4-62 Change Detection Event signal, 6-24...
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Index floating signal sources single pulse, 7-30 connecting single pulse with start trigger, 7-31 MIO X Series devices, 4-13 software-timed, 5-3, 6-14 description getting started, 1-1 AI applications in software MIO X Series devices, 4-13 using in differential mode MIO X Series devices, 4-40 MIO X Series devices, 4-15 AO applications in software, 5-13 using in NRSE mode...
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A-26 MIO X Series devices, 4-2 cabling options, A-26 PXI Express pinout, A-22 specifications, A-26 USB pinout, A-25 National Instruments support and services, NI 6358/6368, A-27 accessory options, A-28 .NET languages documentation, xx cabling options, A-28 NI 6320, A-2...
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Index analog output, 5-6 semi-period measurement, 7-12 AO Pause Trigger, 5-8 two-signal edge-separation measurement, 7-27 AO Sample Clock, 5-10 single-ended connections AO Sample Clock Timebase, 5-12 for floating signal sources AO Start Trigger, 5-7 MIO X Series devices, 4-19 Change Detection Event, 6-24 RSE configuration connecting analog input MIO X Series devices, 4-19...
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Index using low impedance sources (MIO X Series X Series devices), 4-7 accessories and cables, 1-8 PFI terminals accessory options, 2-4 as static digital I/Os, 8-4 cabling options, 2-4 as timing input signals, 8-2 information, A-1 to export timing output signals, 8-3 pinouts, 1-8 RTSI specifications, 1-8, xxi...
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