Panasonic WJ-FS28 Service Manual page 24

1.8.
IC832 to IC843 on the Main Board are using the Field Memory IC YWM5M4C500AV.
Description of this IC is as follows:
Vss 22
SID1 23
SID2 24
SID3 25
SOD1 26
SOD2 27
SOD3 28
(TOP VIEW)
SOD4 1
SOD5 2
SOD6 3
SID4 4
SID5 5
SID6 6
IR7/A7 7
Pin Name I/O
1 SOD4 O
2 SOD5 O Serial Data output terminals. (6-Bit)
3 SOD6 O
4 SID4 I
5 SID5 I Serial Data input terminals (6-Bit).
6 SID6 I
7 IR7/A7 I
8 IR6/A6 I
9 IR5/A5 I
Instruction Code, Column Address
10 IR4/A4 I
and Row Address input terminals.
11 IR3/A3 I
(8-Bit)
12 IR2/A2 I
13 IR1/A1 I
14 A8/A0 I
15 IRS/ I Instruction Strobe signal and Column
CAS Address Strobe signal input terminal.
16 RAS/ I Row Address Strobe signal and
IRE Instruction enable signal input
terminal.
17 SIC I Serial Data In Clock Pulse input
terminal.
18 SOC I Serial Data Out Clock Pulse input
terminal.
19 SIE I Serial Data input enable terminal.
20 SOE I Serial Data output enable terminal.
21 Vcc – Power supply terminal.
22 Vss – Ground terminal.
23 SID1 I
24 SID2 I Serial Data input terminals. (6-Bit)
25 SID3 I
26 SOD1 O
27 SOD2 O Serial Data output terminals. (6-Bit)
28 SOD3 O
21 Vcc
20 SOE
19 SIE
18 SOC
17 SIC
16 RAS/IRE
15 IRS/CAS
14 A8/A0
13 IR1/A1
12 IR2/A2
11 IR3/A3
10 IR4/A4
9 IR5/A5
8 IR6/A6
Description
A8/A0 14
13
IR1/A1
12
IR2/A2
11
IR3/A3
10
IR4/A4
9
IR5/A5
8
IR6/A6
IR7/A7 7
0
Column
Address
0 Row
Address
RAS/IRE 16
IRS/CAS
15
21
Input Row
Address
Counter
Input Row
Decoder
Input Serial
Memory
(256 x 6)
Memory Array
(320 x 256 x 6)
Output Serial
Memory
(256 x 6)
Output Row
Decoder
Output Row
Address
Counter
Instruction Instruction
Register Decoder
Timing Generator
SIC
17
19 SIE
SID1
23
24 SID2
25 SID3
4 SID4
SID5
5
6 SID6
SOD1
26
SOD2
27
SOD3
28
1 SOD4
SOD5
2
3 SOD6
SOE
20
SOC
18
21 Vcc
Vss
22