Xilinx AC701 Si5324 Design Manual page 4

AC701 Si5324 Design Description
Description
– The Si5324 application uses an EDK MicroBlaze system to change the settings
for the Si5324 chip on the AC701 board via IIC
– Note: This design illustrates the relative differences of a Jitter Attenuator device
in Bypass mode or in PLL mode. Neither the Evaluation board nor the design
are for characterization purposes. Please see the Silicon Labs web site for
Jitter Attenuator device data.
Reference Design Source
– AC701 Si5324 Design Files (2014.4 C) ZIP file
– Available through http://www.xilinx.com/ac701
Note: Presentation applies to the AC701