Ports; General-Purpose I/O (Gpio) - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

Ports

Ports
Because of the rich set of peripherals, the ADSP-BF534, ADSP-BF536,
and ADSP-BF537 processor groups the many peripheral signals to four
ports—port F, port G, port H, and port J. Most of the associated pins are
shared by multiple signals. The ports function as multiplexer controls.
Eight of the pins (port F7–0) offer high source/high sink current
capabilities.

General-Purpose I/O (GPIO)

The ADSP-BF534, ADSP-BF536, and ADSP-BF537 processor has 48
bi-directional, general-purpose I/O (GPIO) pins allocated across three
separate GPIO modules—PORTFIO, PORTGIO, and PORTHIO, asso-
ciated with port F, port G, and port H, respectively. Port J does not
provide GPIO functionality. Each GPIO-capable pin shares functionality
with other ADSP-BF534, ADSP-BF536, and ADSP-BF537 processor
peripherals via a multiplexing scheme; however, the GPIO functionality is
the default state of the device upon powerup. Neither GPIO output or
input drivers are active by default. Each general-purpose port pin can be
individually controlled by manipulation of the port control, status, and
interrupt registers:
• GPIO direction control register – Specifies the direction of each
individual GPIO pin as input or output.
• GPIO control and status registers – The ADSP-BF534,
ADSP-BF536, and ADSP-BF537 processor employs a "write one
to modify" mechanism that allows any combination of individual
GPIO pins to be modified in a single instruction, without affecting
the level of any other GPIO pins. Four control registers are pro-
vided. One register is written in order to set pin values, one register
is written in order to clear pin values, one register is written in
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