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13220
Processor Module
13220-91087/23
Rev
JAN-04-82
The
horizontal blank
signal causes
the
dot
streaM
to
be disabled
(blanked) after the 80th character of a row and holds it in the blanked
state until
the
first character of
the next
row.
This
signal
is
obtained by latching the LBCX
(line buffer clock) signal in
Uia
pin 12
and
adding a one
character delay in
U18 pin S.
The
LBCX signal is
active high
at the rising
edge of
lCGAX
during
the 80 active
video
characters.
HBLANK is then
gated through U27
to activate
BLANK and
disable NCUR.
VBlANK
and DISPOFF also blank
the display in a siMilar
fashion.
The last
part of
the video section to consider is the enhanceMent off
circuit which allows the enhanceMent latches to be disabled.
The
ZaOA
sets the ENHOFF signal, output froM U26, which is latched by the RECIRC
signal into
U17.
The
Q
output
(U17
pin S)
is gated through U27 to
clear U210 while the Q'
output
(Ui7 pin
6)
clears U29.
The RECIRC
Signal goes low to take the line buffers out of the recirculate Mode as
they are loaded during scan line 14.
This Means that the ENHOFF bit is
always latched at the start of a new row.
The software can then change
ENHOFF
during an NMI service routine to disable enhanceMent display on
the next row.
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