Chapter 5: Application Example Design; Application Example Design Overview - Xilinx Vivado MIPI CSI-2 Product Manual

Receiver subsystem v4.0
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Application Example Design
This chapter contains step-by-step instructions for generating an MIPI CSI-2 Rx Subsystem
application example design from the MIPI CSI-2 Rx Subsystem by using the Vivado® flow.
Table 5-1: Hardware Details of the Application Example Design
Topology
MIPI Video
• ZCU102 Rev 1.0
Pipe Camera
• AUOS display panel (B101UAN01.7_H/
to Display
• LI-IMX274MIPI-FMC camera sensor
• HDMI monitor supporting 4K@30 fps

Application Example Design Overview

The Application Example Design demonstrates the usage of the MIPI CSI-2 RX Subsystem
and MIPI DSI TX Subsystem on Zynq Ultra Scale+ ZCU102 board. On the capture path, the
system receives images captured by IMX274 image sensor. Processed images are displayed
on either the HDMI monitor or MIPI DSI Display.
A block diagram of the MIPI CSI-2 Rx Subsystem Application Example Design is shown in
Figure
5-1.
MIPI CSI-2 RX Subsystem v4.0
PG232 July 02, 2019
Hardware
W 1A)
module
with at least 12 bpc color depth
www.xilinx.com
Lanes, Line-rate, and Data
Processor
Zynq®
4 Lanes,1440 Mb/s Lane,
MPSoC
RAW10
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Chapter 5
Type
63

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