Stack Pointer; Program Counter; Program Status Register - ST STM32F4 Series Programming Manual

The Cortex-M4 processor
Name
PSR
ASPR
IPSR
EPSR
PRIMASK
FAULTMASK
BASEPRI
CONTROL
1. Describes access type during program execution in thread mode and Handler mode. Debug access can
differ.
2. An entry of either means privileged and unprivileged software can access the register.
General-purpose registers
R0-R12 are 32-bit general-purpose registers for data operations.

Stack pointer

The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the CONTROL register
indicates the stack pointer to use:
•
0: Main Stack Pointer (MSP). This is the reset value.
•
1: Process Stack Pointer (PSP).
On reset, the processor loads the MSP with the value from address 0x00000000.
Link register
The Link Register (LR) is register R14. It stores the return information for subroutines,
function calls, and exceptions. On reset, the processor loads the LR value 0xFFFFFFFF.

Program counter

The Program Counter (PC) is register R15. It contains the current program address. On
reset, the processor loads the PC with the value of the reset vector, which is at address
0x00000004. Bit[0] of the value is loaded into the EPSR T-bit at reset and must be 1.

Program status register

The Program Status Register (PSR) combines:
•
Application Program Status Register (APSR)
•
Interrupt Program Status Register (IPSR)
•
Execution Program Status Register (EPSR)
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Table 2. Core register set summary (continued)
Required
(1)
Type
(2)
privilege
read-write Privileged
read-write Either
read-only Privileged
read-only Privileged
read-write Privileged
read-write Privileged
read-write Privileged
read-write Privileged
DocID022708 Rev 6
Reset
value
0x01000000 Program status register on page 18
Application program status register on
Unknown
page 20
Interrupt program status register on
0x00000000
page 21
Execution program status register on
0x01000000
page 21
0x00000000 Priority mask register on page 23
0x00000000 Fault mask register on page 23
0x00000000 Base priority mask register on page 24
0x00000000 CONTROL register on page 24
PM0214
Description