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Philips Semiconductors
Table 9:
Symbol
DVO_VALID
DVO_CLK
LL_CLK
[1]
Table 10:
Symbol
TDO
TDI
TCK
TRST_N
TMS
[1]
Table 11:
Symbol
I2C_SDA
I2C_SCL
I2C_ADR
Table 12:
Symbol
MPIFCLK
DCLK
XIN
XOUT
XGND
Table 13:
Symbol
INTOUT
Table 14:
Symbol
RESET_N
RESET_SEL
9397 750 13928
Product data
ITU-656 pins
...continued
Pin
Type
52
OD
51
OD
50
ID
It is recommended to bias this pad with a 10 kΩ resistor
JTAG pins
Pin
Type
93
OD
92
ID
94
ID
[1]
96
ID
95
ID
It is recommended to pull-down TRST_N with a 10 kΩ resistor. This ensures correct reset state of internal
TAP circuitry and correct POR of the device within defined state machine.
2
I
C-bus pins
Pin
Type
27
IOD
26
IOD
17
ID
Clock pins
Pin
Type
31
OD
47
OD
38
OSCIN
39
OSCOUT
40
OSCGND
GTU pins
Pin
Type
48
OD
Reset pins
Pin
Type
45
IA
46
ID
Rev. 03 – 23 August 2004
Description
digital video data valid; CMOS; Z
digital video output clock; CMOS; Z
[1]
reserved; TTL; 5VT
Description
JTAG test data out; CMOS
JTAG test data in; TTL-H; 5VT
JTAG test clock; TTL-H; 5VT
JTAG reset (active low); TTL-H; 5VT
JTAG test mode select; TTL-H; 5VT
Description
2
I
C-bus data; TTL; Z; 5VT
2
I
C-bus clock; TTL; Z; 5VT
2
I
C-bus address select (internal pull-down); TTL; 5VT
Description
13.5 MHz or 27 MHz to PNX3000; CMOS
reserved; CMOS
crystal oscillator input
crystal oscillator output
crystal oscillator ground
Description
interrupt line output; Z; 5VT
Description
external reset input
selects between using an external reset input or using
internal POR; TTL; 5VT
HIGH = internal reset
LOW = external reset
PNX2000
Audio video input processor
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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