Ucp300 - Samsung GT-i9100 Service Manual

Level 3 Repair

UCP300

XG626 Ba ll Map (Bottom View) 6 / 15/2010 7.5x7.5
17 16 15 14 13
MEM_BFC MEM_SDC
A
NC MEM_A_8 MEM_A_0
LKO_1 LKO
MEM_A_2 MEM_BFC MEM_CK MEM_RD_
B
MEM_A_9
3 LKO_0 E n
MEM_A_1 MEM_A_2
C
xx x
0 2
MEM_A_1 MEM_A_2 MEM_AD_
D
VSS
x
1 1 13
MEM_A_1 MEM_A_2 MEM_RAS
E
VDDCORE
x
2 0 _n
MEM_A_1 MEM_BC1 MEM_AD_
F
VDD_IO18 VSS
3 _n 15
MEM_A_1 MEM_BC3 MEM_A_1 MEM_BE0 MEM_BE1
G
4 _n 9 _n _n
MEM_A_1 MEM_A_1 MEM_CS2 MEM_CS3
H
x
5 7 _n _n
MEM_A_1 MEM_A_1 MEM_CS0 MEM_CS1
J
VDD_IO18
6 8 _n _n
MEM_WA
K
VDD_MIPI x VDDCORE VSS
IT_n
MIPI_HSI _
L
F32K VSS VSS
x
RX_RDY
MIPI_HSI _ MIPI_HSI _ MIPI_HSI _
M
OSC32K VSS
TX_RDY RX_FLG TX_WAKE
MIPI_HSI _
N
VDD_RTC USB_ID x VSS_USB
RX_DATA
MIPI_HSI _
VDD_USB
P
USB_TEST VBUS RX_WAK
x
_ANA
E
USB_DMI VDD_USBI
R
xx x
NUS O
USB_DPL USB_TUN VDD_USB
T
CC_RST CC_IO
US E _PD
HSIC_USB
U
NC VSS VDD_IO12 CC_CLK
_DATA
17 16 15 14 13
12 11 10 9 8 765432
MEM_BC0 MEM_AD_ FCDP_RB
MEM_A_1 MEM_A_2 MEM_A_3 MEM_A_4
_n 9
MEM_WR MEM_BC2 MEM_CAS DSP_AUDI
VDD_IO18 MEM_A_6 FWP
_n _n _n O_IN1
MEM_A_5 x x MEM_A_7 x x
MEM_AD_ MEM_AD_ MEM_AD_ MEM_AD_
VSS
x
12 11 7 3
VDDCORE MEM_AD_ MEM_AD_ MEM_AD_
VDDCORE
x
_EBU 8 6 5
MEM_AD_
xx x x x TRIG_B
4
MEM_AD_ MEM_AD MEM_AD_
x VSS x
1 V_n 2
MEM_AD_ MEM_AD_ RESERVE
VDDCORE M1
x x
0 10 D
MEM_AD_
VSS x x VSS x M2
14
ETM11_T
x VDD_IO18 EINT3 VDDCORE VDD_IO18
RACECLK
ETM11_T
MIPI_HSI _ VDD_MM MMCI1_C
VSS RACEPKT
x
TX_FLG C MD
5
MMCI1_D
xx x EINT1 EINT2 x
AT_3
MIPI_HSI _
VDD_IO18 I2C1_SCL VPP CLKOUT0 x
TX_DATA
HW_MON
SYS_CLK VSS_PLL CLKOUT2 I2C1_SDA VSS
2
HW_MON
VDD_PLL x x VSS VDDCORE x
VDD_DIG XRESET_ Di3_TX_D Di3_TX_D
VDD_SIM DMINUS TCK
RF N ATX AT
HSIC_USB SYSCLKE Di3_RX_D Di3_RX_D
DPLUS ALERT_N TMS
_STRB N ATX AT
12 11 10 9 8 765432
SAMSUNG Proprietary-Contents may change without notice
This Document can not be used without Samsung's authorization
FBGA
1
VDD_VBA
A
VPLL SD2_SW SD2_SW NC
n T_SD2
B
VIO_12 VSS_SD2
x x x
VDD_VSD VDD_VBA
C
x x VUSB_PD SD2_FB
2 T_SD1
D
ANAMON SD1_FB SD1_SW
x x x
E
VSS FSS SD1_SW
x x x
VDD_VBA VUSB_AN
F
x VRTC VSS_SD1
T_PMU A
G
xxx x VPMU VSIM
H
AGND ON1 VUSB_IO
x x
RESET_P
J
M3 M4 WRDWN_ ON2_N VREF
N
ETM11_T ETM11_T
REF_CLK RESET_B
K
x RACEPKT TM_EN RACEPKT
_EN B_N
4 7
ETM11_T ETM11_T ETM11_T ETM11_T
L
RACEPKT RACEPKT RACEPKT RACEPKT
x x
6 2 3 1
ETM11_T
MMCI1_D MMCI1_D MMCI1_C MMCI1_D
M
RACEPKT
AT_0 AT_2 LK AT_1
0
MMCI1_C I2S2_CLK I2S2_CLK
N
x T_OUT0 x
D 1 0
P
I2S2_TX I2S2_RX
xx x T_OUT1
R
RESET2_N NC x I2S2_WA1 I2S2_WA0
1
USIF1_TX USIF1_RX USIF1_SC
T
TRIG_IN TRST_n
D_MTSR D_MRST LK
USIF1_RT USIF1_CT
U
TDI TDO NC
S_N S_N
1
8-68