Advertisement
7.2.3
Wait Control Registers H and L (WCRH, WCRL)
WCRH and WCRL are 8-bit readable/writable registers that select the number of program wait
states for each area.
Program waits are not inserted in the case of on-chip memory or internal I/O registers.
WCRH and WCRL are initialized to H'FF by a power-on reset and in hardware standby mode.
They are not initialized by a manual reset or in software standby mode.
(1) WCRH
Bit
:
Initial value
:
R/W
:
Bits 7 and 6—Area 7 Wait Control 1 and 0 (W71, W70): These bits select the number of
program wait states when area 7 in external space is accessed while the AST7 bit in ASTCR is set
to 1.
Bit 7
Bit 6
W71
W70
0
0
1
1
0
1
Bits 5 and 4—Area 6 Wait Control 1 and 0 (W61, W60): These bits select the number of
program wait states when area 6 in external space is accessed while the AST6 bit in ASTCR is set
to 1.
Bit 5
Bit 4
W61
W60
0
0
1
1
0
1
138
7
6
W71
W70
1
1
R/W
R/W
Description
Program wait not inserted when external space area 7 is accessed
1 program wait state inserted when external space area 7 is accessed
2 program wait states inserted when external space area 7 is accessed
3 program wait states inserted when external space area 7 is accessed
Description
Program wait not inserted when external space area 6 is accessed
1 program wait state inserted when external space area 6 is accessed
2 program wait states inserted when external space area 6 is accessed
3 program wait states inserted when external space area 6 is accessed
5
4
W61
W60
1
1
R/W
R/W
3
2
W51
W50
1
1
R/W
R/W
1
0
W41
W40
1
1
R/W
R/W
(Initial value)
(Initial value)
Advertisement
