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Hitachi H8S/2633 Hardware Manual page 686

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17.2.3
Serial Mode Register (SMR)
Bit
:
Initial value :
R/W
:
R/W
Note: When the smart card interface is used, be sure to make the 1 setting shown for bit 5.
The function of bits 7, 6, 3, and 2 of SMR changes in Smart Card interface mode.
Bit 7—GSM Mode (GM): Sets the smart card interface function to GSM mode.
This bit is cleared to 0 when the normal smart card interface is used. In GSM mode, this bit is set
to 1, the timing of setting of the TEND flag that indicates transmission completion is advanced
and clock output control mode addition is performed. The contents of the clock output control
mode addition are specified by bits 1 and 0 of the serial control register (SCR).
Bit 7
GM
Description
0
Normal smart card interface mode operation
TEND flag generation 12.5 etu (11.5 etu in block transfer mode) after beginning of
start bit
Clock output ON/OFF control only
1
GSM mode smart card interface mode operation
TEND flag generation 11.0 etu after beginning of start bit
High/low fixing control possible in addition to clock output ON/OFF control (set by
SCR)
Note: etu: Elementary time unit (time for transfer of 1 bit)
668
7
6
GM
BLK
0
0
R/W
5
4
PE
O/E
0
0
R/W
R/W
3
2
BCP1
BCP0
0
0
R/W
R/W
1
0
CKS1
CKS0
0
0
R/W
R/W
(Initial value)

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