Z8536 Cio Device; Base Module Feature Register - Motorola MVME2603-1121A Installation And Use Manual

Block Diagram
3

Z8536 CIO Device

Base Module Feature Register

BIT
FIELD Not Used
OPER
RESET
3-16
source. Interrupt request levels are programmed via the PIB
controller. Refer to the Z85230 data sheet and to the MVME2603/
MVME2604 Programmer's Reference Guide for further information.
The Z8536 CIO device complements the Z85230 ESCC by supplying
modem control lines not provided by the Z85230 ESCC. In addition,
the Z8536 CIO device has three independent 16-bit counters/
timers. The Z85230 receives a 5MHz clock input.
The Base Module Feature Register contains the details of the
MVME2603/2604 single-board computerÕs configuration. It is an 8-
bit read-only register register located on the base board at ISA I/O
address $0802.
Base Module Feature Register Ñ Offset $0802
SD7 SD6 SD5
∗
SCCP PMC2P
R R
N/A 1
SCCP ∗ Z85230 ESCC present. If set, there is no on-board
synchronous serial support (the ESCC is not present). If
cleared, the Z85230 ESCC is installed and there is on-
board support for synchronous serial communication.
PMC2P ∗ PMC/PMCIX slot 2 present. If set, no PCI mezzanine
card (or PCI expansion device) is installed in PMC slot
2. If cleared, PMC/PMCIX slot 2 contains a PCI
mezzanine card (or PCI expansion device).
PMC1P ∗ PMC slot 1 present. If set, no PCI mezzanine card is
installed in PMC slot 1. If cleared, PMC slot 1 contains a
PCI mezzanine card.
SD4 SD3
∗ ∗ ∗
PMC1P VMEP Not Used
R R
N/A N/A
SD2 SD1 SD0
∗
LANP SCSIP
R R
N/A N/A
∗