NEC PC-8201 Service Manual page 135

(2) Read C/S register
'I'he status register is a 7-bit latch and holds 1/0 and tirner status.
Thc C/S register
is read at 1 0 address XXXXX000. Configuration of the status word is shown
below.
I I
I
I
Request for port
B
interruption
AD7 AD6 AD5 AD4 AD3 AD2 AD1 ADO
s p o r t B buffer full
I
Port
B
interruption enabled
I
T~rner interruption. This bit is
high when timer reaches
TC
and
reset when the
CIS
register is read.
(3) PA. PI3 registers
Both registers can be used as either input o r output ports according to programming
of the CIS register. They can also be used in the basic o r strobe mode. The I 0
address of the PA registcr is XXXXXOOI: that of the 1' B register is XXXXXO 10.
Request for port
A
interruption
Port A buffer full
Port
A
interruption enabled
B
BF
TIMER
(4) PC register
The IJC register can be used as an input port, output, o r for control signal according
to the contents of CIS register.
I 0 address of the PC register is XXXXXOI I .
I N T R A
I N T R
B
I N T E
B
( 5 ) Tirtier
This is a 14-bit counter which counts
TIMER
pulses and outputs a square p ~ ~ l s e
when the final value
of TC
is reached. The
I 0
address of the timer register's lower
byte
is XXXXX100. While that of its upper byte is XXXXXlO1.
The timer can be programmed, byte by byte. by writing t o the count length register
(CLR) while selecting the timer address during a write. Bits 0 to 13
store the
count length and bits 14 and I 5 the timer output mode.
The operator can read
the counter contents and the output mode. The initial value is first to the counter
register. It can be take any value from
2
through
3FFF
(hexadecimal).
Timer
format and output mode are shown below.
Output mode
1
Upper digits o f count length
I N T E
A
I
Lower digits of count length
A BF