Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 412

Cmos 32-bit single chip microcomputer
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III PERIPHERAL BLOCK: INPUT/OUTPUT PORTS
RP3–RP0: Port input 3–0 IDMA request (D[3:0]) /
Port input 0–3, high-speed DMA, 16-bit timer 0 IDMA request register (0x40290)
RP7–RP4: Port input 7–4 IDMA request (D[7:4]) /
Serial I/F Ch.1, A/D, Port input 4–7 IDMA request register (0x40293)
Specifies whether to invoke IDMA when an interrupt factor occurs.
When using the set-only method (default)
Write "1": IDMA request
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA request
Write "0": Interrupt request
Read: Valid
RP7 to RP0 are IDMA request bits corresponding to the port-input 7 to 0 interrupts, respectively. If the bit is set to
"1", IDMA is invoked when an interrupt factor occurs, thereby performing a programmed data transfer. If the bit is
set to "0", normal interrupt processing is performed, without invoking IDMA.
For details on IDMA, refer to "IDMA (Intelligent DMA)".
At initial reset, RP is set to "0" (interrupt request).
DEP3–DEP0: Port input 3–0 IDMA enable (D[3:0]) /
Port input 0–3, high-speed DMA, 16-bit timer 0 IDMA enable register (0x40294)
DEP7–DEP4: Port input 7–4 IDMA enable (D[7:4]) /
Serial I/F Ch.1, A/D, Port input 4–7 IDMA enable register (0x40297)
Enables IDMA transfer by means of an interrupt factor.
When using the set-only method (default)
Write "1": IDMA enabled
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA enabled
Write "0": IDMA disabled
Read: Valid
If DEP is set to "1", the IDMA request by the interrupt factor is enabled. If the register bit is set to "0", the IDMA
request is disabled.
After an initial reset, DEP is set to "0" (IDMA disabled).
B-III-9-24
EPSON
S1C33L03 FUNCTION PART

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