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CIRCUIT DESCRIPTION
26
* PLL Unlock Detection
The unlock control signal is derived from the signal
provided by an unlock detector in IC1 (Pin 7). The un-
lock detector signal is processed by Q1 (2SA1162(Y))
and IC2 (TC4S81F) for controlling the automatic voltage
regulator (AVR) to disable the transmitter by switching
the transmitter 5V supply (57) off, if an unlock condi-
tion occurs.
UNLOCK : L
PLL UNIT (X58-3550-1 1)
Z
This unlock signal is also sent to the control unit for
monitoring of the PLL condition, performed by the main
micro-processor. lf the transmission frequency is not de-
fined or the unit is malfunctioning,
a BEEP alarm will be
emitted. (Figure 3)
~d UNLOCK: H
i.
Fig. 3 Unlock detection circuit
2. Transmitter Modulator Circuit
The audio signal from the microphone or the option-
al DTMF encoder is applied to the microphone amplifier
module unit through VR1
or VR2. The signal is pre-
emphasized while being amplified by a 2-stage opera-
tional amplifier (IC 1) in the module unit and routed to
the modulator (MOD) terminal of the VCO sub-unit to
generate an FM signal.
The microphone amplifier is a voltage saturation type,
in which the signal level can not exceed the supply vol-
tage of the amplifier, limiting its maximum output level
and this operation is temperature compensated by a ther-
mister (TH1). The output signal from the amplifier is rout-
ed through a resistor divider network (VR3 and R34) in
the TX-RX-unit for the maximum deviation setting, and
is then applied to the VCO unit for modulating the carrier.
When the sub-audible signalling (QT or DOT) encoder
is enabled, the microcomputer generates the sub-audible
signal and it is applied to the TCXO
and the VCO.
(Figure 4)
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