D-Board Block Diagram - Panasonic TH-42PWD8WK Service Manual

15.27. D-Board Block Diagram

D
DIGITAL SIGNAL PROCESSOR
FORMAT CONVERTER,
PlASMA AI
SUB-FIELD PROCESSOR
TO J1 D1
R(M)
R/PR(M) 4
G(M)
G/Y(M)
8
B(M)
B/PB(M)
12
HD(M)
HD(M) 16
VD(M)
VD(M) 18
DPMS_HD
DPMS HD 17
DPMS_VD
DPMS VD 20
TO J5/J6 D5
RX0+(M)
RX0+(M) 2
RX0-(M)
RX0-(M) 3
RX1+(M)
RX1+(M) 5
RX1-(M)
RX1-(M) 6
RX2+(M)
RX2+(M) 8
RX2-(M)
RX2-(M) 9
RX3+(M)
RX3+(M) 11
RX3-(M)
RX3-(M)
12
RXC+(M)
RXC+(M) 14
RXC-(M)
RXC-(M) 15
RXC+(S)
RXC+(S) 17
RXC-(S)
RXC-(S) 18
RX0+(S)
RX0+(S) 20
RX0-(S)
RX0-(S) 21
RX1+(S)
RX1+(S) 23
RX1-(S)
RX1-(S) 24
RX2+(S)
RX2+(S) 26
RX2-(S)
RX2-(S) 27
RX3+(S)
RX3+(S) 29
RX3-(S)
RX3-(S) 30
P+12V
TO P25 D25
P+12V 1
P+12V 2
P+5V
P+5V
7
STB+5V_M
P+5V 9
STB+5V 10
F_STBY_ON 13
PS_SOS 16
PANEL_MAIN_ON 17
ALL_OFF 18
IC9953
STB+5V STB 3.3V
2
IICBUS
P+5V
STB+3.3V
STB+5V
D3 1 9 29
TO J3
TH-37/42PWD8 SERIES
D-Board Block Diagram
IC9002 IC9001
P+5V
3.3V 8bit A/D CONVERTER
+3.3V
8-bit
CLAMP PGA
ADC
HSYNC HSYNC
HD,VD,CLP
SYNC
VSYNC VSYNC
CLAMP SEPA DTCLK
IIC
IICBUS
P+5V IC9031
LEVEL CONVERTER
VDD
5V 3.3V
IC9951 IC9955
3.3V
+3.3V +2.5V
IC9952
IC9954
1.5V
+1.5V
+1.2V
Q9951-Q9953
TV_ON/OFF
VOLTAGE
CONTROL
STB_ON
PS_SOS
TV_ON/OFF
ALL_OFF
STB+3.3V
IC9704
4
RESET
2 RESET 1
IC9703
SDA1
VCC 5
EEPROM
SCL1
6
64k
2 4 5 6 7 11 12 13 15 17 19 21 23 25 27
CLK
R,G,B
MAIN_VIDEO
24bit
Block
Loop
HD,VD,CLK
CONT.
TX0 3-(M)
TX0 3+(M)
TXC-(M)
TXC+(M)
TX0 3-(S)
TX0 3+(S)
TXC-(S)
TXC+(S)
HD_M,VD_M
HD_S,VD_S
IICBUS
SCL2
SDA2
IC9203
2.5V
2.5V
FPGA PROM
VCC
VCCENT
CLK TDI
1.2V
TMS
DO
TCK
TDO_PROM
TRST
P12V
R9811
R9812 Q9702
P+12V SOS
1.5V
R9814
R9815
Q9703
P+1.5V SOS
3.3V
R9817
R9818
Q9704
P+3.3V SOS
STB3.3V
IC9711
OR GATE
A Q9707
Y
B
Q9706
5VRXD_TU
STB3.3V
5VTXD_TU
DRVRST_5V
LED_R
LED_G
NRST
STB+3.3V
28 31 32 35 36 D4 1 2 4 5 6
1.2V 2.5V 3.3V
1.2V 2.5V 3.3V
LVDS
RECEIVER
Low
Voltage
RGB
Differential
Signaling
PICTURE
OUTPUT
TTL
PARALLEL
DATA
VD HD CLK
SYNC SIGNAL
HD,VD
CONTROL
HD,VD,CLK
CLK
HD,VD
CLP
IC9201
SYNC SIGNAL CONTROL
LVDS RECEIVER
DISCHARGE VOLTAGE CONTROL
TTL S/P FPGA
IIC
DISCHARGE
CONT.
CONTROL
CLK
DIN/O
JTAG
3.3V
P5V
R9813
3.3V
D9711
R9823
R9820
R9822
R9816
R9821
Q9705
D9712
P+3.3V SOS
P5V
R9819
R9824
D9713
P+5V SOS
R9825
STB_ON
PS_SOS
TV_ON/OFF
ALL_OFF
SOUND_MUTE
CABLE_DET
POWER_STAT
RTC_INT
KEY_INPUT
STB3.3V
IC9715
RXD_TU
VCC
5V 3.3V
TXD_TU
VCC
DRVRST
IC9714 LED_R
LED_G
5V 3.3V
NRST
NRST
LEVEL CONVERTER
STB+5V
7 8 9 10 11 12 14
FOR
FACTORY USE
R,G,B
MAIN VIDEO
24bit
R,G,B
SUB VIDEO
24bit
HD,VD,CLK
HD,VD,CLK
OSD_HD0/VD0
IC
PPL SY
CLKM_IN
SUSTAIN
DATA
TIMING
SCAN
FLASH AD18-20
ROM
SOS BLINKING TIMES
P+3.3V SOS:LED 3TIMES
P+5V SOS:LED 4TIMES
96 P+3.3V SOS
95 P+5V SOS
112 STB_ON
94 PS_SOS
20 TV_ON/OFF
60 ALL_OFF
145 SOUND_MUTE
88 CABLE_DET
87 POWER_STATUS
86 RTC_INT
97 KEY_INPUT
125 RESET
108 REMOCON OUT
102 REMOCON IN
105 REMOCON INH
107 RXD_TU
106 TXD_TU
16
DRVRST
109 LED_R
110 LED_G
17 NRST
89