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Philips Semiconductors Interconnectivity 23 September 1998 Firmware Programming Guide for PDIUSBD12 Version 1.0 _______________________________________________________________________________________________ Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
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Interconnectivity Page 2 of 22 Firmware Programming Guide for PDIUSBD12 This is a legal agreement between you (either an individual or an entity) and Philips Semiconductors. By accepting this product, you indicate your agreement to the disclaimer specified as follows: DISCLAIMER PRODUCT IS DEEMED ACCEPTED BY RECIPIENT.
The data exchange between the background ISR (Interrupt Service Routine) and the foreground Main Loop is achieved by event flags and data buffers. For example, the PDIUSBD12 Main bulk out endpoint can use a circular data buffer. When PDIUSBD12 receives a data packet from USB, an interrupt request is generated to the CPU and the CPU will service ISR immediately.
2.1.1 Hardware Abstraction Layer - EPPHAL.C This is the lowest layer code in the firmware, which performs hardware dependent I/O access to PDIUSBD12, as well as Evaluation Board hardware. When porting the firmware to other CPU platforms, this part of code always needs modifications or additions.
It's very easy to use the firmware in polling mode. Inside the Main Loop, add following code: if(interrupt_pin_low) fn_usb_isr(); Normally ISR is initiated by hardware. In polling mode, the Main Loop detects interrupt pin's state, and invokes ISR if necessary. Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
All I/O access to PDIUSBD12 should be implemented by the first two functions above (outportb and inportb). As for the last function, it is meant for implementing the "EPP DMA" function. The latter is for setting the EPP page address and CPLD counter.
Page 8 of 22 Firmware Programming Guide for PDIUSBD12 5. Interrupt Service Routine The PDIUSBD12 firmware is fully interrupt driven. The flow of ISR is straightforward and this is shown below. ISR Entry Read D12 Interrupt Register Reset Idle Timer...
5.1 Bus Reset and Suspend Change Bus reset and suspend does not require special processing within ISR. ISR either sets the bus_reset flag or suspends the bit in EPPFLAGS and exit. Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
Control transfer always begins with the SETUP stage and then followed later by an optional DATA stage. It then ends with the STATUS stage. The diagram below shows the various states of transitions on the Control endpoints. The firmware uses these 3 states to handle Control transfer correctly. Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
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Control Read? Set Event: Setup Packet Control Write with Control State <- USB_IDLE Data? Set Event: Setup Packet Data length Acceptable? Stall Control Control State <- USB_RECEIVE Endpoints End of Handler Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
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Write Control In Buffer with Data Size State <- USB_IDLE of EP0 Packet Size of EP0 Packet Size State <- USB_TRANSMIT State <- USB_IDLE End of Control In Handler The flowchart above shows the Control In handler. Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
Clear Main In Interrupt Bit End of Main Out Handler End of Main In Handler 5.5 EOT Handler For more information on EOT handler, please refer to the section "DMA Support". Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
Clear device feature according to "Feature Selector" Is recipient an Interface? Unsupported Command Is recipient an endpoint? Clear endpoint feature according to "Feature Selector" Sent zero length packet to Host End Clear Feature Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
Therefore, MCU will need to write a zero length data packet to the host as the acknowledgment phase. Set Address Write new address to device_addr register Sent zero length packet to Host. End Set Address Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
16 bytes of memory. MCU will need to set a register to indicate the location of the transmitted size. Philips Semiconductors - Asia Product Innovation Centre Visit...
For Set Interface request on our evaluation board, MCU need not do anything except to send one zero data packet to the host as an acknowledgment phase. Philips Semiconductors - Asia Product Innovation Centre Visit...
Set device feature according to "Feature Selector" Is recipient an Interface? Unsupported Command Is recipient an endpoint? Set endpoint feature according to "Feature Selector" Sent zero length packet to Host End Set Feature Philips Semiconductors - Asia Product Innovation Centre Visit http://www.flexiusb.com...
8. DMA Support 8.1 Introduction to Protocol Based DMA Operation PDIUSBD12 has 6 endpoints, 2 control endpoints, 2 generic endpoints, and 2 main endpoints. The main endpoints support DMA transfer. In the protocol based DMA operation, the host application first asks the device's firmware to setup DMA transfer using vendor request, which is sent through the control endpoint.
8.4 Setup DMA Request Setup DMA request is a vendor request that is sent through control pipe. In PDIUSBD12 sample firmware and Applet, this is done by IOCTL_WRITE_REGISTER, which is defined by Microsoft Still Image USB Interface in Windows 98 DDK. The device's request is described below.