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1-4. Board Location
IF-914 board
MB-998 board
DC-124 board
DPR-231 board
WLL-CA50
PS-645 board
SW-1128 board
SW-1129 board
SW-1130 board
1-5. Circuit Description
1-5-1. Video/Audio Signals (DPR-231 Board)
The video and audio signals input at the 40-pin interface of
the camcorder are input to the FPGA (IC200) on the DPR-
231 board through the input buffers (IC1, 2, 3) on the MB-
998 board.
. Video signal:
D1 digital data of 10-bit parallel
. Audio signal:
Serial digital data of CH 1&2 and
CH 3&4
The following signals for the timing controls of the video/
audio signals are also input at the 40-pin interface of the
camcorder:
. For video signal: CAM CK27, CA CF, CA HD, CA VD,
CA SYNC
. For audio signal: CA FSO, CA 64 FSC
The video signal to be input to the FPGA is selected from
the following two signals by the output enable controllers
consisting of IC2 and IC3, or IC105 and IC106.:
. Video signal from the camcorder
. SDI signal input to the SPARE connector
Selection is made as follows:
When the UNREG +12 V input from the 40-pin interface
of the camcorder is detected, the video signal from the
camcorder is selected. When the camcorder is powered off,
that is, the UNREG +12 V is not detected, the SDI signal
is selected.
The TRS (Timing Reference Signal) based on the sync
signals (CA CF, CA HD, CA VD) is added to the 10-bit
digital video signal input to the FPGA. Then, in accor-
dance with the MPEG encoder, the high 8 bits are input to
the MPEG encoder module.
The audio signal is selected from the following signals in
the FPGA:
. Audio signal from the camcorder
. Audio signal in the SDI signal input at the SPARE
connector
The audio signal in the SDI signal is separated from the
digital video signal input to the FPGA. Like the video
signal, the selection of the audio signal is depending on the
UNREG +12 V input to the 40-pin interface. When the
UNREG +12 V is detected, the CH 1&2 of the CH 1&2
and CH 3 & 4 digital audio signals is output from the
FPGA, and is input to the MPEG encoder module. When
the UNREG +12 V is not detected, the CH 1&2 digital
audio signal of the group 1 in the SDI signal is input to the
MPEG encoder module.
1-3 (E)
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