Table of Contents
Advertisement
Appendix
Mass Storage Processors
The mass storage processors for the MSU0402/0451 are microprogrammed periph-
eral processors that connect to the central processor via high-speed 110 channels
and relieve the central processor system of all device-oriented functions. The mass
storage processors for the MSU0402/0451 are listed in Table A-I.
Components
The mass storage processors consist of the following components (see Figure A-I).
• Read-Only Memory- provides access and storage to resident control and diag-
nostic microprograms.
• Microprocessor- interprets all the microinstructions and performs their
specified operations.
• Scratchpad memory- provides temporary storage for data buffering param-
eters and command storage.
• Peripheral Subsystem Interface (PSI) Control- provides the logic and buffering
necessary to interface with the one-byte-wide PSI to sustain data transfer and
control dialogs.
• Device Level Interface (DLI) Control- provides the logic and buffering neces-
sary to interface with DLIs to sustain data transfers and control dialogs in addi-
tion to verification information generation and checking.
The options available for the mass storage processors are listed in Table A-2.
Mass Storage Processors
A-I
AT7I-03
Advertisement
Table of Contents
