EXTERNAL INTERRUPT
CIRCUIT
INT1
INT0
Address: 000F
EIC
H
HARDWARE CONFIGURATION
2.14 EXTERNAL INTERRUPT CIRCUIT
The edges of two external-interrupt sources (INT0 and INT1) can be de-
tected to set the corresponding flag.
An interrupt can be generated at the same time the flag is set.
Both interrupt can release the STOP or SLEEP mode.
Block Diagram
EIR1
SL11
SL10
EIE1
1
X
0
0
0
1
MPX
Fig. 2.43 External Interrupt Circuit Block Diagram
Register List
Address: 000F
H
Description of Registers
External-interrupt control register (EIC)
The EIC controls an interrupt by the IRQ pin.
Bit 7
Address: 000F
EIR1
H
(R/W)
2-85
EIR0
SL01
SL00
EIE0
8 bit
R/W External-interrupt control register
EIC
Bit 6
Bit 5
Bit 4
Bit 3
SL11
SL10
EIE1
EIR0
(R/W)
(R/W)
(R/W)
(R/W)
IRQ1
IRQ0
EIC
1
X
0
0
0
1
MPX
Bit 2
Bit 1
Bit 0
SL01
SL00
EIE0
(R/W)
(R/W)
(R/W)
Initial value
00000000
B