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Epson S1C31D50 Technical Instructions page 223

Cmos 32-bit single chip microcontroller
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#QSPISSn
1
QSPICLKn
QSDIOn[3:0]
QSPI_nINTF.TBEIF
QSPI_nINTF.RBFIF
Data (W) → QSPI_nTXD
Software operations
Figure 15.5.9.1 Example of Data Transfer Operations in Slave Mode (QSPI_nMOD.CHDL[3:0] bits =
Data transmission
Read the QSPI_nINTF.TBEIF bit
QSPI_nINTF.TBEIF = 1 ?
Yes
Write transmit data to
the QSPI_nTXD register
Transmit data remained?
No
End
15.5.10.
Terminating Data Transfer in Slave Mode
A procedure to terminate data transfer in slave mode is shown below.
1. Wait for an end-of-transmission interrupt (QSPI_nINTF.TENDIF bit = 1). Or determine end of transfer
via the received data.
2. Set the QSPI_nCTL.MODEN bit to 0 to disable the QSPI Ch.n operations.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
2
1
2
3
Data (W) → QSPI_nTXD
QSPI_nMOD.CHLN[3:0] bits = 0x3)
No
Yes
Wait for an interrupt request
(QSPI_nINTF.TBEIF = 1)
Figure 15.5.9.2 Data Transfer Flowcharts in Slave Mode
Seiko Epson Corporation
4
1
2
3
4
Data (W) → QSPI_nTXD
QSPI_nRXD → Data (R)
Data reception
Wait for an interrupt request
(QSPI_nINTF.RBFIF = 1)
Read receive data from
the QSPI_nRXD register
Receive data remained?
1
2
3
4
QSPI_nRXD → Data (R)
Yes
No
End
15-29

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