Block Diagram; Figure 4-1. Mvme6100 Block Diagram - Motorola MVME6100 Installation And User Manual

Chapter 4 Functional Description
Table 4-1. MVME6100 Features Summary (continued)
Feature
VME Interface
PMCspan Support
Form Factor
Miscellaneous

Block Diagram

Figure 4-1 shows a block diagram of the overall board architecture.

Figure 4-1. MVME6100 Block Diagram

Gigabit
Ethernet
RJ-45
36
MVME6100 Installation and Use (V6100A/IH2)
Description
– Tsi148 VME 2eSST ASIC provides:
■
Eight programmable VMEbus map decoders
■
A16, A24, A32, and A64 address
■
8-bit, 16-bit, and 32-bit single cycle data transfers
■
8-bit, 16-bit, 32-bit, and 64-bit block transfers
■
Supports SCT, BLT, MBLT, 2eVME, and 2eSST protocols
■
8 entry command and 4KB data write post buffer
■
4KB read ahead buffer
– One PMCspan slot
– Supports 33/66 MHz, 32/64-bit PCI bus
– Access through PCI6520 bridge to PMCspan
– Standard 6U VME
– Combined reset and abort switch
– Status LEDs
– 8-bit software-readable switch (S1)
– VME geographical address switch (S3)
– Boundary Scan header (J8)
– CPU RISCWatch COP header (J42)
L3 Cache DDR RAM
2MB 512MB-1GB
211 MHz DDR
DDR RAM
MPC7457
512MB-1GB
1.267 GHz
133 MHz
133 MHz
Processor Bus
Memory Bus
Discovery II
Host
Bridge
64-bit/133 MHz PCI-X
Gigabit
64-bit/33/66/100 MHz PCI-X
Ethernet
FP I/O
RJ-45
PMC
Slot 1
Rows A&C
Jumper
64-pins Rows D&Z
Selectable
46-pins
P2
Soldered
Flash
Bank A
64MB
Soldered
Flash
Bank B
RTC
NVRAM 64MB
Device Bus
Serial
FP I/O
P-P Bridge
IPMC
VME
Slot 2
TSI148
PMC Span
Connector
P1
RJ-45
header
32/64-bit,
33/66 MHz PCI
4250 0604