System Block Diagram - Motorola MTX Series Programmer's Reference Manual

Board Description and Memory Maps
1
Table 1-1. MTX Series Features Summary (Continued)
Feature
RTC and
Watchdog Timer
Memory
Controller
PCI Host Bridge
Interrupt
Controller
PCI Interface
Form Factor
Peripheral
Support
PCI/PMC
Expansion
Miscellaneous

System Block Diagram

1-2
Description
MK48T59 Device
Falcon Chipset
Raven ASIC
RavenMPIC (Raven ASIC)
32/64-bit Data, up to 33 MHz operation
ATX
Two 16550-compatible async serial ports
Two sync/async serial ports
One Host-mode Parallel Port
One Peripheral-mode Parallel Port
8-bit or 16-bit single-ended SCSI interface
AUI or 10BaseT/100BaseTX Ethernet interface
One PS/2 Keyboard and one PS/2 Mouse
One PS/2 Floppy Port
Two EIDE ports
Build option for two 32/64-bit PMC slots with back-panel I/O
Build option for one 32/64-bit PCI Connector for horizontal PCI card via
special riser
Build option for three 32-bit vertical PCI card slots with back panel I/O
RESET/ABORT Switch
Status LEDs
The MTX series provides the 256KB look-aside external cache option.
The Falcon chip set controls the boot Flash and the ECC DRAM. The
Raven ASIC functions as the 64-bit PCI host bridge and the MPIC
interrupt controller. PCI devices include: SCSI, Ethernet, and one PMC
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