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Chapter 2 Programming Details
MPC8540 Reset Configuration
The MVME3100 supports the power-on reset (POR) pin sampling method for MPC8540 reset
configuration. The states of the various configuration pins on the MPC8540 are sampled when reset is
de-asserted to determine the desired operating modes. The following table describes the configuration
options and the corresponding default setting. Refer to the MPC8540 Reference Manual listed in
Appendix A, Related
Table 2-1. MPC8540 Power-on Reset Configuration Settings
MPC8540 Signal
PCI_REQ64_L
PCI_GNT1_L
PCI_GNT2_L
PCI_GNT3_L
PCI_GNT4_L
EC_MDC
TSEC1_
TXD7
24
MVME3100 Programmer's Guide (V3100A/PG1)
Documentation, for additional details and/or programming information.
Default
Select Option
Setting
PLD logic
0
Resistor
0
Resistor
1
Resistor
1
Switch
0
Resistor
1
Resistor
0
Description
State of Bit vs Function
PCI-32
0
Configuration
1
PCI Interface I/O
0
Impedance
1
PCI Arbiter
0
Configuration
1
PCI Debug
0
Configuration
1
PCI/PCI-X
0
Configuration
1
TSEC Width
0
Configuration
1
TSEC1 Protocol
0
Configuration
1
1
PCI/PCI-X interface is
64-bit
PCI/PCI-X interface is
32-bit
25 ohm drivers
42 ohm drivers
Disabled on-chip
2
PCI/PCI-X arbiter
Enabled on-chip
PCI/PCI-X arbiter
PCI debug enabled
PCI operates in
normal mode
PCI-X mode
PCI mode
Ethernet in reduced
mode (RTBI or RGMII)
Ethernet in standard
mode (TBI or GMII)
TSEC1 controller uses
GMII protocol (RGMII
if TSEC1 configured in
reduced mode)
TSEC1 controller uses
TBI protocol (RTBI if
TSEC1 configured in
reduced mode)
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