NEC V850/SF1 User Manual page 27

Pin
Name
Internal ROM
F R
A16 to Hold the last accessed address
A21
AD0 to Hi-Z
AD15
ASTB H
R/W H
DSTB H
LBEN H
UBEN H
WAIT Invalid
HLDRQ Maskable
HLDAK H or L
WRL H
WRH H
RD H
Note Active
Caution When accessing an FCAN register with the external memory expanded, a bus cycle for FCAN
access is generated in AD0 to AD15 and A16 to A21. However, R/W, DSTB, LBEN, UBEN, WRL,
WRH, and RD are inactive.
Remarks 1. F: Fetch
R: Read
W: Write
2. H: High-level output
L: Low-level output
Hi-Z: High-impedance
CHAPTER 4
Table 4-1. Bus Interface Pin Operation List (2/2)
(b) During run
Internal Memory
Internal RAM Internal
Peripheral I/O
F R W R
User's Manual U15447EJ1V0UM
CAUTIONS
External Memory
Emulation RAM
W F R
Active
Active
Active
Active
H
Active
Active
Maskable
Maskable
H or L
H
H
H
Target System
W F R W
Active
Active
Active
Active
Active
Active
Active
Maskable
Maskable
H or L
H Note
H Note
Note H
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