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Memory Map/Register Definition
Table 26-16. PQSPAR Field Description (continued)
Bits
2
1
0
26.3.2.13 Port TC Pin Assignment Register (PTCPAR)
The PTCPAR controls the pin function of port TC.
7
Field
PTCPA3
Reset
R/W:
Address
Figure 26-26. Port TC Pin Assignment Register (PTCPAR)
Bits
7–6
5-4
26-22
Name
PQSPA2
Port QS pin assignment 2. This bit configures the port QS2 pin for its primary
function (QSPI_CLK) or digital I/O.
1 Port QS2 pin configured for primary function (QSPI_CLK)
0 Port QS2 pin configured for digital I/O
PQSPA1
Port QS pin assignment 1. This bit configures the port QS1 pin for its primary
function (QSPI_DIN) or digital I/O.
1 Port QS1 pin configured for primary function (QSPI_DIN)
0 Port QS1 pin configured for digital I/O
PQSPA0
Port QS pin assignment 0. This bit configures the port QS0 pin for its primary
function (QSPI_DOUT) or digital I/O.
1 Port QS0 pin configured for primary function (QSPI_DOUT)
0 Port QS0 pin configured for digital I/O
6
5
PTCPA2
IPSBAR + 0x10_005A
Table 26-17. PTCPAR Field Descriptions
Name
PTCPA3
Port TC pin assignment 3. This field configures the port TC3 pin for
its primary function (DTIN3), alternate 1 function (URTS1),
alternate 2 function (URTS0) or digital I/O.
00 Port TC3 pin configured for digital I/O
01 Port TC3 pin configured for alternate 2 function (URTS0)
10 Port TC3 pin configured for alternate 1 function (URTS1)
11 Port TC3 pin configured for primary function (DTIN3)
PTCPA2
Port TC pin assignment 2. This field configures the port TC2 pin for
its primary function (DTOUT3), alternate 1 function (URTS1),
alternate 2 function (URTS0) or digital I/O.
00 Port TC2 pin configured for digital I/O
01 Port TC2 pin configured for alternate 2 function (URTS0)
10 Port TC2 pin configured for alternate 1 function (URTS1)
11 Port TC2 pin configured for primary function (DTOUT3)
MCF5282 User's Manual
Description
4
3
2
PTCPA1
0000_0000
R/W
Description
1
0
PTCPA0
MOTOROLA
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