3.1.2 Mode data
Mode data is stored at FFFFDF
fetched during a reset sequence and stored in the mode register inside the device. The mode register
value can be changed only by a reset sequence.
The setting of this register is valid after the reset sequence.
Always set the reserved bits to '0.'
Here is a diagram of the setting of the bits.
Mode data
Address: FFFFDF
[bit 7, 6] : Bus mode setting bits
These bits are used to specify the operation mode after the reset sequence is completed. Here shows
the relationship between the bits and the functions.
[bit 3] : Mode setting bits
These bits are used to specify the bus mode or access mode after the reset sequence is completed.
The following table shows the relationship between the bits and the functions.
MB90580 Series
of main memory and used for controlling the CPU operation. This data is
H
7
6
M1
M0
H
M1
M0
0
0
Single chip mode
0
1
Internal ROM and external bus mode
1
0
External ROM and external bus mode
1
1
(Inhibited)
S0
0
External data bus, 8-bit mode
1
External data bus, 16-bit mode
5
4
3
—
—
S0
Function
Function
3.1 Memory Access Modes
2
1
0
—
—
—
Remarks
Remarks
Chapter 3: Memory
Bit No.
33