Epson S1D13706 Technical Manual page 121

Epson Research and Development
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8.3.6 Picture-in-Picture Plus (PIP
+
PIP Window Display Start Address Register 0
REG[7C]
7 6
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PIP Window Display Start Address Register 1
REG[7Dh]
7 6
+
PIP Window Display Start Address Register 2
REG[7Eh]
7 6
bits 16-0
Note
+
PIP Window Line Address Offset Register 0
REG[80h]
7 6
+
PIP Window Line Address Offset Register 1
REG[81h]
7 6
bits 9-0
Note
Hardware Functional Specification
Issue Date: 01/11/13
+
) Registers
+
PIP Window Display Start Address Bits 7-0
5
+
PIP Window Display Start Address Bits 15-8
5
n/a
5
+
PIP Window Display Start Address Bits [16:0]
These bits form the 17-bit address for the starting double-word of the PIP
Note that this is a double-word (32-bit) address. An entry of 00000h into these registers
represents the first double-word of display memory, an entry of 00001h represents the sec-
ond double-word of the display memory, and so on.
These bits have no effect unless the PIP
4).
+
PIP Window Line Address Offset Bits 7-0
5
n/a
5
+
PIP Window Line Address Offset Bits [9:0]
These bits are the LCD display's 10-bit address offset from the starting double-word of
line "n" to the starting double-word of line "n + 1" for the PIP
a 32-bit address increment.
These bits have no effect unless the PIP
4).
4 3
4 3
4 3
+
Window Enable bit is set to 1 (REG[71h] bit
4 3
4 3
+
Window Enable bit is set to 1 (REG[71h] bit
Read/Write
2 1
Read/Write
2 1
Read/Write
PIP
Display Start
2 1
+
window.
Read/Write
2 1
Read/Write
+
PIP Window Line Address
Offset Bits 9-8
2 1
+
window. Note that this is
X31B-A-001-08
Page 115
0
0
+
Window
Address
Bit 16
0
0
0
S1D13706